From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8419DC433EF for ; Wed, 1 Dec 2021 14:40:59 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1350661AbhLAOoR (ORCPT ); Wed, 1 Dec 2021 09:44:17 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:46590 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1350796AbhLAOkk (ORCPT ); Wed, 1 Dec 2021 09:40:40 -0500 Received: from sin.source.kernel.org (sin.source.kernel.org [IPv6:2604:1380:40e1:4800::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C0F63C0619F0; Wed, 1 Dec 2021 06:36:15 -0800 (PST) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by sin.source.kernel.org (Postfix) with ESMTPS id 05BEECE1F45; Wed, 1 Dec 2021 14:36:14 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 36097C53FAD; Wed, 1 Dec 2021 14:36:12 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1638369372; bh=fDcjDlre3zNps+euRe6r4MeUW9GiVltCf2FiglTDJMs=; h=References:In-Reply-To:From:Date:Subject:To:Cc:From; b=VLTlm+NlLTM0kPmYPSPC6h9zN18cLntfOTO5Rn7DcIIBiO4T9qMaNUwZ1ina5SVdq jt1zBgCxUFCePozohANIKWOYgkFPdUcTnBHvEPTFxPiPTZnhvqLC3fkqAbJhzKl7ku ajETGRMDZE4TosIOsFrRu+f/Bu6DfRfEdS50NobUXqz85xoSyADSd3HBC1PAl8zMH/ RMBRQ1NB71RPefklnKpWwJ0Dz/dBMCB5LyevsXePyz6jFbo5ns/S5wbAj0/GUVnMDf LS4+28h5hukLa/smezZ2m/oUjjkmp5pSCduV6uLjSl+60PHzv34uapDF7VO+dNQZGU AtTrjPEVMWVBg== Received: by mail-ed1-f47.google.com with SMTP id e3so102642682edu.4; Wed, 01 Dec 2021 06:36:12 -0800 (PST) X-Gm-Message-State: AOAM530UTRbSU2ONP1cIj2Q6YYpQ70hLIuT2bsEDgfLTEZlpWAOPz1A7 UwhvrzNO7d2hYJaj36WLjZkKEQXlIXgKR7pTww== X-Google-Smtp-Source: ABdhPJycrMzjLRRzGghWaRYfmnXIZP4mbV7XJfZv7HiaQKS7jnZWOj0jW3iacRJ5wzExr310Lv3vHf2qBAx4QlVmRfI= X-Received: by 2002:a17:907:a411:: with SMTP id sg17mr7542058ejc.84.1638369370499; Wed, 01 Dec 2021 06:36:10 -0800 (PST) MIME-Version: 1.0 References: <20211122103032.517923-1-maz@kernel.org> <8735no70tt.wl-maz@kernel.org> <87tug3clvc.wl-maz@kernel.org> <87r1b7ck40.wl-maz@kernel.org> <87tufvmes9.wl-maz@kernel.org> <87bl21mqwk.wl-maz@kernel.org> In-Reply-To: From: Rob Herring Date: Wed, 1 Dec 2021 08:35:55 -0600 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH] of/irq: Add a quirk for controllers with their own definition of interrupt-map To: "Lad, Prabhakar" Cc: Marc Zyngier , Geert Uytterhoeven , Prabhakar Mahadev Lad , "linux-kernel@vger.kernel.org" , "devicetree@vger.kernel.org" , "kernel-team@android.com" , John Crispin , Biwen Li , Chris Brandt , "linux-renesas-soc@vger.kernel.org" Content-Type: text/plain; charset="UTF-8" Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wed, Dec 1, 2021 at 7:37 AM Lad, Prabhakar wrote: > > Hi Marc/Rob, > > On Tue, Nov 30, 2021 at 6:37 PM Marc Zyngier wrote: > > > > On Tue, 30 Nov 2021 12:52:21 +0000, > > "Lad, Prabhakar" wrote: > > > > > > On Mon, Nov 29, 2021 at 6:33 PM Rob Herring wrote: > > > > > > > > interrupts would work just fine here: > > > > > > > > interrupts = , > > > > , > > > > , > > > > , > > > > , > > > > , > > > > , > > > > ; > > > > > > > > We don't need a different solution for N:1 interrupts from N:M. Sure, > > > > that could become unweldy if there are a lot of interrupts (just like > > > > interrupt-map), but is that an immediate problem? > > > > > > > It's just that with this approach the driver will have to index the > > > interrupts instead of reading from DT. > > > > > > Marc - is it OK with the above approach? > > > > Anything that uses standard properties in a standard way works for me. > > > I added interrupts property now instead of interrupt-map as below: > > irqc: interrupt-controller@110a0000 { > compatible = "renesas,r9a07g044-irqc", "renesas,rzg2l-irqc"; > #address-cells = <0>; > interrupt-parent = <&gic>; > interrupt-controller; > reg = <0 0x110a0000 0 0x10000>; > interrupts = > , > , > , > , > , > , > , > , > , > , > , > , > , > , > , > , > , > , > , > , > , > , > , > , > , > , > , > , > , > , > , > , > , > , > , > , > , > , > , > , > ; > clocks = <&cpg CPG_MOD R9A07G044_IA55_CLK>, > <&cpg CPG_MOD R9A07G044_IA55_PCLK>; > clock-names = "clk", "pclk"; > power-domains = <&cpg>; > resets = <&cpg R9A07G044_IA55_RESETN>; > }; > > > In the hierarchal interrupt code its parsed as below: > on probe fetch the details: > range = of_get_property(np, "interrupts", &len); > if (!range) > return -EINVAL; > > for (len /= sizeof(*range), j = 0; len >= 3; len -= 3) { > if (j >= IRQC_NUM_IRQ) > return -EINVAL; > > priv->map[j].args[0] = be32_to_cpu(*range++); > priv->map[j].args[1] = be32_to_cpu(*range++); > priv->map[j].args[2] = be32_to_cpu(*range++); > priv->map[j].args_count = 3; > j++; Not sure what's wrong, but you shouldn't be doing your own parsing. The setup shouldn't look much different than a GPIO controller interrupts except you have multiple parent interrupts. Rob