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s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=yS3fm+DQ2x2C5P53VSHT4jNsa6Sc3H5C2Hm5M3Nknq4=; b=ssY6gAL9VTfT+NHCdpiP1aKjCCGtBWmFm0UYJWytEWxriqfYVKvWD21hzUwT1l7EgP +r5qb3Zt8Lk56ajcCrGpnnT1pTMq6CE3D+azo5UeXJ39dfnke8yFzRFJ8GxC78C5iq9F b2kbQqUyUXEpZi+k/+CkAzFzix9cbbMCBFxpRJlv9rE4BhAEioqzaN7/NlrRpiNRq77U 7x0NZjkYp8Rv/5FHZK0wipxl76+d49Y5JZxdAdEOPbf0M2JptVNY+GbPb62I0GoLiMWw 2s+hqn3pH1iX8Q5XzfMVgoT4yrzizaa2yiZOr2VY18uJWxM4kV4FarXY/wH38DXDYX4U 8qzA== X-Gm-Message-State: AOAM533DdVVu3A1f3gpN4YE/3Nk1mtZyUuGp3jdtEEYayQm5H6pA9YEs ZXrVZgh21leycOzjNtz1Av9eHgkgeP/ZFZVynPyDLg== X-Google-Smtp-Source: ABdhPJzrwsfOI49dru7x7lboVFngg2TkqiM0nkzgqG1M/NOgcgMRkjzlz1ejzQklBaXMgc0sCbb3wuUcDPD6It3NwGY= X-Received: by 2002:a05:6e02:c2e:: with SMTP id q14mr28039382ilg.2.1625096353282; Wed, 30 Jun 2021 16:39:13 -0700 (PDT) MIME-Version: 1.0 References: <20210623085530.GF13058@arm.com> <20210624165228.GB25097@arm.com> <20210625092253.GJ13058@arm.com> <20210625120137.GC20835@arm.com> <20210625123959.GB3170@willie-the-truck> <20210625135350.GD20835@arm.com> <20210628101448.GA5503@willie-the-truck> <20210628152023.GA9308@arm.com> <20210629104625.GA7168@willie-the-truck> <20210630151906.GD3426@arm.com> In-Reply-To: <20210630151906.GD3426@arm.com> From: Peter Collingbourne Date: Wed, 30 Jun 2021 16:39:02 -0700 Message-ID: Subject: Re: [PATCH v5] arm64: mte: allow async MTE to be upgraded to sync on a per-CPU basis To: Catalin Marinas Cc: Will Deacon , Szabolcs Nagy , Vincenzo Frascino , Evgenii Stepanov , Linux ARM , Tejas Belagod X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210630_163916_351245_25AAD2CC X-CRM114-Status: GOOD ( 46.24 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Wed, Jun 30, 2021 at 8:19 AM Catalin Marinas wrote: > > On Tue, Jun 29, 2021 at 12:11:17PM -0700, Peter Collingbourne wrote: > > On Tue, Jun 29, 2021 at 3:46 AM Will Deacon wrote: > > > On Mon, Jun 28, 2021 at 04:20:24PM +0100, Catalin Marinas wrote: > > > > Another option is a mapping table where async can be remapped to sync > > > > and sync to async (or even to "none" for both). That's not far from one > > > > of Peter's mte-upgrade-async proposal, we just add mte-map-async and > > > > mte-map-sync options. Most likely we'll just use mte-map-async for now > > > > to map it to sync on some CPUs but it wouldn't exclude other forced > > > > settings. > > > > > > Catalin and I discussed this offline and ended up with another option: > > > retrospectively change the prctl() ABI so that the 'flags' argument > > > accepts a bitmask of modes that the application is willing to accept. This > > > doesn't break any existing users, as we currently enforce that only one > > > mode is specified, but it would allow things like: > > > > > > prctl(PR_SET_TAGGED_ADDR_CTRL, > > > PR_MTE_TCF_SYNC | PR_MTE_TCF_ASYNC, > > > 0, 0, 0); > > > > > > which is actually very similar to Peter's PR_MTE_DYNAMIC_TCF proposal, with > > > the difference that I think this extends more naturally as new PR_MTR_TCF_* > > > flags are introduced. > > > > > > Then we expose a per-cpu file in sysfs (say "cpuX/mte_tcf_preferred") > > > which initially reads as "async". If the root user does, e.g. > > > > > > # echo "sync" > cpu1/mte_tcf_preferred > > > > > > then a task which has successfully issued a PR_SET_TAGGED_ADDR_CTRL prctl() > > > request for PR_MTE_TCF_SYNC | PR_MTE_TCF_ASYNC will run in sync mode on > > > CPU1, but async mode on other CPUs (assuming they retain the default value). > > > > > > We'll need to special-case PR_MTE_TCF_NONE, as that's just a shorthand for > > > "no flags" so doing PR_MTE_TCF_NONE | PR_MTE_TCF_SYNC is just the same as > > > doing PR_MTE_TCF_SYNC (which I think is already the behaviour today). The > > > only values which the sysfs files would accept today are "sync" and "async". > > > > > > When faced with a situation where the prctl() flags for a task do not > > > intersect with the preferred mode for a CPU on which the task is going > > > to run, the lowest bit number flag is chosen from the mask set by the > > > prctl(). > > > > > > Thoughts? > > > > This all sounds great and I'm glad you were able to come to an > > agreement on this. I'll get started on implementing it. > > > > Once we have ASYM support I'm not sure if we can rely on bit numbering > > for ordering, as we will want the ordering to be ASYNC < ASYM < SYNC > > and ASYNC is bit-adjacent to SYNC. So I think we will need to make > > ASYM a special case. > > The bit position based order - SYNC < ASYNC < ASYM - is indeed arbitrary > but I think it's easier to follow. When we add ASYM, it will be the last > one rather than squeezing it in the middle of the current order. Any > other order somehow implies that one is better than the other but we > don't have a clear definition for "better". At least from my perspective "more strict" is a reasonable enough definition for "better", at least by default, since it seems like what most users would want. If users really want a different ordering, perhaps it can be an opt-in behavior. > > This would also allow NONE to be upgraded by allocating a bit position > > for NONE, but if we change the value of NONE it may break applications > > built against new headers running on old kernels, so maybe it should > > be made a separate constant. This doesn't need to be done immediately, > > though. > > I think we should leave NONE as non-upgradable, the software doesn't > expect any fault when accessing with the wrong tag. We also can't change > the definition now as it's already in upstream glibc. Right, I was thinking that if we made this upgradeable we would introduce a constant with a different name, like NONE2 or NONE_UPGRADEABLE or something. Peter _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel