From mboxrd@z Thu Jan 1 00:00:00 1970 From: Rick Chen Date: Mon, 3 May 2021 13:35:14 +0800 Subject: [PATCH v6 2/7] riscv: cpu: fu740: Add support for cpu fu740 In-Reply-To: <752D002CFF5D0F4FA35C0100F1D73F3FE5E97817@ATCPCS12.andestech.com> References: <20210408134020.238658-1-green.wan@sifive.com> <20210408134020.238658-3-green.wan@sifive.com> <752D002CFF5D0F4FA35C0100F1D73F3FE5E97817@ATCPCS12.andestech.com> Message-ID: List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de > From: Green Wan [mailto:green.wan at sifive.com] > Sent: Thursday, April 08, 2021 9:40 PM > Cc: bmeng.cn at gmail.com; Green Wan ; Rick Jian-Zhi Chen(???) ; Paul Walmsley ; Palmer Dabbelt ; Anup Patel ; Atish Patra ; Pragnesh Patel ; Lukasz Majewski ; Joe Hershberger ; Ramon Fried ; u-boot at lists.denx.de > Subject: [PATCH v6 2/7] riscv: cpu: fu740: Add support for cpu fu740 > > Add SiFive fu740 cpu to support RISC-V arch > > Signed-off-by: Green Wan > Reviewed-by: Bin Meng > --- > arch/riscv/Kconfig | 1 + > arch/riscv/cpu/fu740/Kconfig | 37 +++++++++++++++ > arch/riscv/cpu/fu740/Makefile | 12 +++++ > arch/riscv/cpu/fu740/cache.c | 55 +++++++++++++++++++++++ > arch/riscv/cpu/fu740/cpu.c | 22 +++++++++ > arch/riscv/cpu/fu740/dram.c | 38 ++++++++++++++++ > arch/riscv/cpu/fu740/spl.c | 23 ++++++++++ > arch/riscv/include/asm/arch-fu740/cache.h | 14 ++++++ > arch/riscv/include/asm/arch-fu740/clk.h | 14 ++++++ > arch/riscv/include/asm/arch-fu740/gpio.h | 38 ++++++++++++++++ arch/riscv/include/asm/arch-fu740/reset.h | 13 ++++++ > arch/riscv/include/asm/arch-fu740/spl.h | 14 ++++++ > arch/riscv/lib/sifive_clint.c | 1 - Refer to comments about [PATCH v7 1/8]. https://www.mail-archive.com/u-boot at lists.denx.de/msg405522.html Hope same code base can be effective re-use in the future. Reviewed-by: Rick Chen