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From: Daniel Stone <daniel@fooishbar.org>
To: Rodrigo Vivi <rodrigo.vivi@intel.com>
Cc: intel-gfx <intel-gfx@lists.freedesktop.org>
Subject: Re: [PATCH 04/31] drm/i915: Handle actual IPS enabled state.
Date: Fri, 13 Nov 2015 18:20:00 +0000	[thread overview]
Message-ID: <CAPj87rMQpevGQtBEp6NaybnZ07KuFAksEFJtD77pG2hehEmyMA@mail.gmail.com> (raw)
In-Reply-To: <1446749423-4789-5-git-send-email-rodrigo.vivi@intel.com>

Hi Rodrigo,

On 5 November 2015 at 18:49, Rodrigo Vivi <rodrigo.vivi@intel.com> wrote:
> With this we know if IPS is actually enabled.
> It might not be activated on BDW since Hardware take
> the decision and do its transition. However we have
> the visibility of the state on our driver what we didn't
> had until this patch. At least on BDW.
>
> Since ips_ready means that ips will be enabled and ips_disable()
> checks for the state of our enabled/disabled state machine
> we can remove that FIXME that was there for crtc_load_lut
> workaround for Haswell.
>
> With this state machine and ips being disabled from
> different places and many times when testcases with sink_crtc
> for instance it is better to have it protected with its own mutex lock.
> Ohterwise we cannot guarantee consitent ips.enabled state with the
> register bit.

Thinking about this, I have two comments (and second Chris's
similar-ish comment about PSR):

Should this perhaps be a CRTC property rather than a device property?
Is it tied to a particular pipe, or can it move away from pipe A?

Secondly, having a vblank wait to enable IPS is pretty unfortunate, as
it makes modesets take longer. I like the PSR enable being split away
from the modeset sequence, so perhaps we could do something like:

enum ips_state {
  IPS_DISABLED = 0, /**< unsupported or explicitly disabled by module param */
  IPS_READY, /**< IPS can be enabled if a suitable state is applied to
the CRTC (planes enabled, cdclk not exceeding 95% on BDW) */
  IPS_ARMED, /**< suitable configuration applied; IPS pending activation */
  IPS_ACTIVE
};

Having this on the CRTC state means that we could walk through the
following process:
  - IPS_READY set on suitable platforms when not explictly disabled
  - modeset arrives: atomic_check examines conditions and changes
state from IPS_READY to IPS_ARMED
  - next pageflip arrives and changes state from IPS_ARMED to
IPS_ACTIVE, activates IPS

Being a member of the CRTC state means that anyone duplicating the
pipe's CRTC state could discover the IPS status like that, and
eliminates the need for a second mutex.

Maybe that's not the best approach, but I think we need to find a way
to take the synchronous vblank wait out of the modeset path. Using a
workqueue is another option, but synchronisation would need to be
quite carefully handled.

Cheers,
Daniel
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx

  parent reply	other threads:[~2015-11-13 18:20 UTC|newest]

Thread overview: 69+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-11-05 18:49 [PATCH 00/31] IPS/DRRS/PSR rework with PSR enabled by default Rodrigo Vivi
2015-11-05 18:49 ` [PATCH 01/31] drm/i915: Rename IPS ready variable at pipe config Rodrigo Vivi
2015-11-05 18:49 ` [PATCH 02/31] drm/i915: Move IPS related stuff to intel_ips.c Rodrigo Vivi
2015-11-05 18:49 ` [PATCH 03/31] drm/i915: Add IPS DockBook Rodrigo Vivi
2015-11-05 18:49 ` [PATCH 04/31] drm/i915: Handle actual IPS enabled state Rodrigo Vivi
2015-11-07 19:19   ` Daniel Stone
2015-11-13 18:20   ` Daniel Stone [this message]
2015-11-13 18:38     ` Ville Syrjälä
2015-11-13 18:55       ` Daniel Stone
2015-11-13 20:28         ` Ville Syrjälä
2015-11-13 21:42           ` Daniel Stone
2015-11-05 18:49 ` [PATCH 05/31] drm/i915: Fix IPS initialization Rodrigo Vivi
2015-11-05 18:49 ` [PATCH 06/31] drm/i915: Fix IPS disable sequence Rodrigo Vivi
2015-11-10 16:34   ` Daniel Stone
2015-11-11 23:31     ` Vivi, Rodrigo
2015-11-12 11:24       ` Daniel Stone
2015-11-05 18:49 ` [PATCH 07/31] drm/i915: IPS Sysfs interface Rodrigo Vivi
2015-11-05 21:04   ` Chris Wilson
2015-11-18 10:04     ` Daniel Vetter
2015-11-18 18:32       ` Vivi, Rodrigo
2015-11-09 11:37   ` Daniel Stone
2015-11-05 18:50 ` [PATCH 08/31] drm/i915: Add psr_ready on pipe_config Rodrigo Vivi
2015-11-05 18:50 ` [PATCH 09/31] drm/i915: Only enable DRRS if PSR won't be enabled on this pipe Rodrigo Vivi
2015-11-05 18:50 ` [PATCH 10/31] drm/i915: Detatch i915.enable_psr from psr_ready Rodrigo Vivi
2015-11-18 10:07   ` Daniel Vetter
2015-11-18 18:35     ` Vivi, Rodrigo
2015-11-19  9:19       ` Daniel Vetter
2015-11-05 18:50 ` [PATCH 11/31] drm/i915: Use intel_crtc instead of intel_dp on PSR enable/disable functions Rodrigo Vivi
2015-11-05 18:50 ` [PATCH 12/31] drm/i915: Fix PSR initialization Rodrigo Vivi
2015-11-18 10:12   ` Daniel Vetter
2015-11-18 18:39     ` Vivi, Rodrigo
2015-11-19  9:34       ` Daniel Vetter
2015-11-05 18:50 ` [PATCH 13/31] drm/i915: Organize Makefile new display pm group Rodrigo Vivi
2015-11-05 18:50 ` [PATCH 14/31] drm/i915: Create intel_drrs.c Rodrigo Vivi
2015-11-05 18:50 ` [PATCH 15/31] drm/i915: Use intel_crtc instead of intel_dp on DRRS enable/disable functions Rodrigo Vivi
2015-11-05 18:50 ` [PATCH 16/31] drm/i915: Fix DRRS initialization Rodrigo Vivi
2015-11-18 10:13   ` Daniel Vetter
2015-11-05 18:50 ` [PATCH 17/31] drm/i915: Add sys PSR toggle interface Rodrigo Vivi
2015-11-05 21:03   ` Chris Wilson
2015-11-05 18:50 ` [PATCH 18/31] drm/i915: Force PSR exit when IRQ_HPD is detected on eDP Rodrigo Vivi
2015-11-05 18:50 ` [PATCH 19/31] drm/i915: Remove duplicated dpcd write on hsw_psr_enable_sink Rodrigo Vivi
2015-11-05 18:50 ` [PATCH 20/31] drm/i915: PSR: Let's rely more on frontbuffer tracking Rodrigo Vivi
2015-11-05 18:50 ` [PATCH 21/31] drm/i915: PSR: Mask LPSP hw tracking back again Rodrigo Vivi
2015-11-05 18:50 ` [PATCH 22/31] drm/i915: Delay first PSR activation Rodrigo Vivi
2015-11-05 18:50 ` [PATCH 23/31] drm/i915: Reduce PSR re-activation time for VLV/CHV Rodrigo Vivi
2015-11-05 18:50 ` [PATCH 24/31] drm/i915: PSR: Don't Skip aux handshake on DP_PSR_NO_TRAIN_ON_EXIT Rodrigo Vivi
2015-11-09 10:38   ` Jani Nikula
2015-11-10 15:41     ` Vivi, Rodrigo
2015-11-05 18:50 ` [PATCH 25/31] drm/i915: Send TP1 TP2/3 even when panel claims no NO_TRAIN_ON_EXIT Rodrigo Vivi
2015-11-09 10:39   ` Jani Nikula
2015-11-10 15:42     ` Vivi, Rodrigo
2015-11-05 18:50 ` [PATCH 26/31] drm/i915: Fix idle_frames counter Rodrigo Vivi
2015-11-05 18:50 ` [PATCH 27/31] drm/i915: Allow 1 vblank to let Sink CRC calculation to start or stop Rodrigo Vivi
2015-11-10 20:12   ` Paulo Zanoni
2015-11-05 18:50 ` [PATCH 28/31] drm/i915: Make Sink crc calculation waiting for counter to reset Rodrigo Vivi
2015-11-10 20:31   ` Paulo Zanoni
2015-11-10 21:49     ` Paulo Zanoni
2015-11-18 10:25       ` Daniel Vetter
2015-11-18 18:42         ` Vivi, Rodrigo
2015-11-05 18:50 ` [PATCH 29/31] drm/i915: Stop tracking last calculated Sink CRC Rodrigo Vivi
2015-11-10 21:36   ` Paulo Zanoni
2015-11-05 18:50 ` [PATCH 30/31] drm/i915: Rely on TEST_SINK_START instead of tracking Sink CRC state on dev_priv Rodrigo Vivi
2015-11-10 21:44   ` Paulo Zanoni
2015-11-05 18:50 ` [PATCH 31/31] drm/i915: Enable PSR by default Rodrigo Vivi
2015-11-05 21:07   ` Chris Wilson
2015-11-05 21:30     ` Vivi, Rodrigo
2015-11-09 11:47 ` [PATCH 00/31] IPS/DRRS/PSR rework with PSR enabled " Daniel Stone
2015-11-10 15:57   ` Vivi, Rodrigo
2015-11-10 16:26     ` Daniel Stone

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