From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.4 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER,INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3462EC07E96 for ; Thu, 15 Jul 2021 15:18:33 +0000 (UTC) Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 8E0E4613D2 for ; Thu, 15 Jul 2021 15:18:32 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 8E0E4613D2 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=chromium.org Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 7989C829CA; Thu, 15 Jul 2021 17:18:29 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=chromium.org Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (1024-bit key; unprotected) header.d=chromium.org header.i=@chromium.org header.b="EDOF/Ajc"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id 67769829EE; Thu, 15 Jul 2021 17:18:26 +0200 (CEST) Received: from mail-wr1-x436.google.com (mail-wr1-x436.google.com [IPv6:2a00:1450:4864:20::436]) (using TLSv1.3 with cipher TLS_AES_128_GCM_SHA256 (128/128 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 0D7D680214 for ; Thu, 15 Jul 2021 17:18:23 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=chromium.org Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=sjg@google.com Received: by mail-wr1-x436.google.com with SMTP id l7so8269205wrv.7 for ; Thu, 15 Jul 2021 08:18:23 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=INOOvMAEkQAUJH0qpfehF4me2pJIll2F9JvkwhjTmPo=; b=EDOF/Ajczvv5F4zOLjxB39anGS9rp99zopfJyoJ0eexyeiTXGX+KB1yQJzFJQIjUAs c1id8FIJE6axjkK8J6dkHYyhEWnaDNBbBiJ/4l+YvVvWJ1Pqb/EjtolbXzJGEPpvhgXu 8PetB99lhLb3rNqdgmoJOyBcHwSLA9KtQWtGg= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=INOOvMAEkQAUJH0qpfehF4me2pJIll2F9JvkwhjTmPo=; b=dwudAlZznK1PZOujxG37nn/+ZiD6JRLoEzg8D+M1NSxl7RnDqBair6jAX71579Z5GY KOxk10TZ/f5qVWagu26htH1c5XMEHDoUTYEdDt7bLi9jo47Me1GwZ9Hm6cCKqqoD+uWa Q/+K9zx06s+NUsBaXXPr4fr2v3Wh9YHnlXVdeVvozMBB1zI1aMLHCcEfgzz3MwWItrsQ 7R/Ddk5OFQhZqC0zT/YNQlZsgIJA+0uHC6c2iCgxZHaOYFsPnrcwVeQgDCcQCJ+s5Ud4 G5dHjaLAazD4yAMbpioGT7SM96Jxo51nxIipbALNGIsbbFuWVqKo+Nne6x70d8Hjiav3 wT/w== X-Gm-Message-State: AOAM531r60/g6JYAampuqmhDmyPJsUat08VhsnFKqfHV2JgfYBX5FTbi rTJ2gL1OYHxkaN4HjYSlsMTZ/7Mu0biBL/2MTond+g== X-Google-Smtp-Source: ABdhPJyYYPJz5fkX4XZVPwxAsD69HBYlRKjhdf+ATu7LsUc6aVgKAb0o1yIxTQPDHxokfgk5esUV73H4W4l0zluMOMU= X-Received: by 2002:adf:ec4b:: with SMTP id w11mr6400191wrn.420.1626362302273; Thu, 15 Jul 2021 08:18:22 -0700 (PDT) MIME-Version: 1.0 References: <20210627235111.485507-1-sjg@chromium.org> <20210627175102.v3.3.I967ea8c85e009f870c7aa944372d32c990f1b14a@changeid> In-Reply-To: From: Simon Glass Date: Thu, 15 Jul 2021 09:18:10 -0600 Message-ID: Subject: Re: [PATCH v3 03/16] x86: Allow coreboot serial driver to guess the UART To: Bin Meng Cc: Andy Shevchenko , U-Boot Mailing List Content-Type: text/plain; charset="UTF-8" X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.34 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.2 at phobos.denx.de X-Virus-Status: Clean Hi Bin, On Thu, 15 Jul 2021 at 05:44, Bin Meng wrote: > > Hi Simon, > > On Mon, Jun 28, 2021 at 7:51 AM Simon Glass wrote: > > > > At present this driver relies on coreboot to provide information about > > the console UART. However if coreboot is not compiled with the UART > > enabled, the information is left out. This configuration is quite > > common, e.g. with shipping x86-based Chrome OS Chromebooks. > > > > Add a way to determine the UART settings in this case, using a > > hard-coded list of PCI IDs. > > > > Signed-off-by: Simon Glass > > --- > > > > (no changes since v1) > > > > drivers/serial/serial_coreboot.c | 68 ++++++++++++++++++++++++++++---- > > include/pci_ids.h | 1 + > > 2 files changed, 61 insertions(+), 8 deletions(-) > > > > Based on discussion of the last version, this patch should be dropped. > I will see if I can drop it when applying. OK thanks, I'll see what other ideas I can come up with. Regards, Simon