From mboxrd@z Thu Jan 1 00:00:00 1970 From: Phil Edworthy Date: Tue, 03 Nov 2015 09:00:42 +0000 Subject: RE: [PATCH 0/3] Fix rcar-pcie for arm64 Message-Id: List-Id: References: <1446482175-26507-1-git-send-email-phil.edworthy@renesas.com> <20151102213305.GA1158@tetsubishi> In-Reply-To: <20151102213305.GA1158@tetsubishi> MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: Wolfram Sang Cc: Bjorn Helgaas , Geert Uytterhoeven , Simon Horman , "linux-pci@vger.kernel.org" , "linux-sh@vger.kernel.org" , "linux-kernel@vger.kernel.org" Hi Wolfram, On 02 November 2015 21:33, Wolfram wrote: > > The first patches fixes the build problem, and the second patch reverts the > > patch that removed the driver from arm64 builds. The final patch add a compat > > string for the r8a7795 (arm64) device. > > Thanks. I will test them next week when I have access to my board again. It's worth mentioning that I had some troubles on my Salvator-X board with some cards not being able to link up. Since my board has a socketed chip and the board was designed for it not to be via a socket, and this is such a low level functionality, I think this is HW related. My Intel Gigabit CT Desktop card always works. Also note that this PCIe controller only supports a 32-bit AXI address range, so you need to limit memory to within the 4GiB address space. As far as I am aware, there is no way to limit the dma mask that card drivers use via the controller. The plan is to add support this via IOMMU. > > Apart from patches to add the PCIe clock and DT nodes, I had to revert these > > patches to get it to work on arm64: > > f075915ac0b1 ("PCI/MSI: Drop domain field from msi_controller") > > d8a1cb757550 ("PCI/MSI: Let pci_msi_get_domain use struct > device::msi_domain") > > Does that solve the MSI problems you mentioned? It avoids the problem, but I have a proper fix in the pipeline which just needs more testing. Thanks Phil From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752334AbbKCJAt (ORCPT ); Tue, 3 Nov 2015 04:00:49 -0500 Received: from relmlor2.renesas.com ([210.160.252.172]:63041 "EHLO relmlie1.idc.renesas.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1752029AbbKCJAr convert rfc822-to-8bit (ORCPT ); Tue, 3 Nov 2015 04:00:47 -0500 X-IronPort-AV: E=Sophos;i="5.20,238,1444662000"; d="scan'208";a="197740971" From: Phil Edworthy To: Wolfram Sang CC: Bjorn Helgaas , Geert Uytterhoeven , Simon Horman , "linux-pci@vger.kernel.org" , "linux-sh@vger.kernel.org" , "linux-kernel@vger.kernel.org" Subject: RE: [PATCH 0/3] Fix rcar-pcie for arm64 Thread-Topic: [PATCH 0/3] Fix rcar-pcie for arm64 Thread-Index: AQHRFYzsivm5EFrv6Uqrj/dDE01tbp6JQQSAgAC8z3A= Date: Tue, 3 Nov 2015 09:00:42 +0000 Message-ID: References: <1446482175-26507-1-git-send-email-phil.edworthy@renesas.com> <20151102213305.GA1158@tetsubishi> In-Reply-To: <20151102213305.GA1158@tetsubishi> Accept-Language: en-GB, en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: authentication-results: spf=none (sender IP is ) smtp.mailfrom=phil.edworthy@renesas.com; x-originating-ip: [193.141.220.21] x-microsoft-exchange-diagnostics: 1;PS1PR06MB1179;5:8ZvDjeS/rCmnO7O/JjxYoPd+n/+EShNf8z2/JWm5xpkXtaTWV6PiSSWBsRh/QO/BTY52yv9HkXB2bap+6dbQVygoqHaOBhFpIfDDZJ3so0QCanKu5rGAoeI5mcArDr/7+MY6Qtx4gnYqsg+cezEq1g==;24:hUD5bfYHWhCutvdkq3q4ZpcgHN8zbKkX84tQ2d459QO0f9v5GVn5ii9CdqZ7Ot7kHr1K9t5pTkF0eP8eke2V6sakvMn34dOR2zkQZjfnvks=;20:FKagQNPtZ8LhtFhHaklDvGTWieP9o5nFAdZKxpmiK7Sx2o5iAy3rJTcAa8bSHxmZUZJiMRQ7Nhb0YREgWJcI55c27KW0uYwEwYHf0Np9dEnk/VMWIvgv4Zwvizvrntj+7kl++u1qSAS+jnwWBQrcIKdGzmeB7BRbjhpCuEsdXZM= x-microsoft-antispam: UriScan:;BCL:0;PCL:0;RULEID:;SRVR:PS1PR06MB1179; x-microsoft-antispam-prvs: x-exchange-antispam-report-test: UriScan:; x-exchange-antispam-report-cfa-test: BCL:0;PCL:0;RULEID:(601004)(2401047)(5005006)(8121501046)(520078)(10201501046)(3002001);SRVR:PS1PR06MB1179;BCL:0;PCL:0;RULEID:;SRVR:PS1PR06MB1179; x-forefront-prvs: 0749DC2CE6 x-forefront-antispam-report: SFV:NSPM;SFS:(10019020)(6009001)(24454002)(199003)(189002)(106116001)(87936001)(40100003)(97736004)(81156007)(106356001)(66066001)(50986999)(76176999)(54356999)(92566002)(105586002)(33656002)(122556002)(101416001)(189998001)(575784001)(5008740100001)(5007970100001)(86362001)(5004730100002)(5001960100002)(5003600100002)(110136002)(76576001)(11100500001)(74316001)(5002640100001)(77096005)(2950100001)(102836002)(2900100001)(10400500002);DIR:OUT;SFP:1102;SCL:1;SRVR:PS1PR06MB1179;H:PS1PR06MB1180.apcprd06.prod.outlook.com;FPR:;SPF:None;PTR:InfoNoRecords;A:1;MX:1;LANG:en; spamdiagnosticoutput: 1:23 spamdiagnosticmetadata: NSPM Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 8BIT MIME-Version: 1.0 X-OriginatorOrg: renesas.com X-MS-Exchange-CrossTenant-originalarrivaltime: 03 Nov 2015 09:00:42.5394 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 53d82571-da19-47e4-9cb4-625a166a4a2a X-MS-Exchange-Transport-CrossTenantHeadersStamped: PS1PR06MB1179 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Wolfram, On 02 November 2015 21:33, Wolfram wrote: > > The first patches fixes the build problem, and the second patch reverts the > > patch that removed the driver from arm64 builds. The final patch add a compat > > string for the r8a7795 (arm64) device. > > Thanks. I will test them next week when I have access to my board again. It's worth mentioning that I had some troubles on my Salvator-X board with some cards not being able to link up. Since my board has a socketed chip and the board was designed for it not to be via a socket, and this is such a low level functionality, I think this is HW related. My Intel Gigabit CT Desktop card always works. Also note that this PCIe controller only supports a 32-bit AXI address range, so you need to limit memory to within the 4GiB address space. As far as I am aware, there is no way to limit the dma mask that card drivers use via the controller. The plan is to add support this via IOMMU. > > Apart from patches to add the PCIe clock and DT nodes, I had to revert these > > patches to get it to work on arm64: > > f075915ac0b1 ("PCI/MSI: Drop domain field from msi_controller") > > d8a1cb757550 ("PCI/MSI: Let pci_msi_get_domain use struct > device::msi_domain") > > Does that solve the MSI problems you mentioned? It avoids the problem, but I have a proper fix in the pipeline which just needs more testing. Thanks Phil