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From: "Roger Pau Monné" <roger.pau@citrix.com>
To: Jan Beulich <jbeulich@suse.com>
Cc: "xen-devel@lists.xenproject.org" <xen-devel@lists.xenproject.org>,
	"Andrew Cooper" <andrew.cooper3@citrix.com>, Wei Liu <wl@xen.org>,
	George Dunlap <george.dunlap@citrix.com>
Subject: Re: [PATCH v3 9/9] x86/P2M: relax permissions of PVH Dom0's MMIO entries
Date: Thu, 23 Sep 2021 17:32:41 +0200	[thread overview]
Message-ID: <YUyeGYFMdeiPFHV3@MacBook-Air-de-Roger.local> (raw)
In-Reply-To: <959850f7-1d06-7dee-b9fe-0d28d068b8e4@suse.com>

On Thu, Sep 23, 2021 at 05:22:08PM +0200, Jan Beulich wrote:
> On 23.09.2021 17:15, Roger Pau Monné wrote:
> > On Thu, Sep 23, 2021 at 02:15:25PM +0200, Jan Beulich wrote:
> >> On 23.09.2021 13:54, Roger Pau Monné wrote:
> >>> On Thu, Sep 23, 2021 at 01:32:52PM +0200, Jan Beulich wrote:
> >>>> On 23.09.2021 13:10, Roger Pau Monné wrote:
> >>>>> On Tue, Sep 21, 2021 at 09:21:11AM +0200, Jan Beulich wrote:
> >>>>>> --- a/xen/arch/x86/mm/p2m.c
> >>>>>> +++ b/xen/arch/x86/mm/p2m.c
> >>>>>> @@ -1319,6 +1319,18 @@ static int set_typed_p2m_entry(struct do
> >>>>>>              return -EPERM;
> >>>>>>          }
> >>>>>>  
> >>>>>> +        /*
> >>>>>> +         * Gross bodge, to go away again rather sooner than later:
> >>>>>> +         *
> >>>>>> +         * For MMIO allow access permissions to accumulate, but only for Dom0.
> >>>>>> +         * Since set_identity_p2m_entry() and set_mmio_p2m_entry() differ in
> >>>>>> +         * the way they specify "access", this will allow the ultimate result
> >>>>>> +         * to be independent of the sequence of operations.
> >>>>>
> >>>>> Wouldn't it be better to 'fix' those operations so that they can work
> >>>>> together?
> >>>>
> >>>> Yes, but then we should do this properly by removing all abuse of
> >>>> p2m_access_t.
> >>>
> >>> I'm not sure I follow what that abuse is.
> >>
> >> As was clarified, p2m_access_t should be solely used by e.g.
> >> introspection agents, who are then the entity responsible for
> >> resolving the resulting faults. Any other uses (to e.g. merely
> >> restrict permissions for other reasons) are really abuses.
> > 
> > But some p2m types don't really have a fixed access tied to them, for
> > example MMIO regions just inherit whatever is the default access for
> > the domain, which makes all this look slightly weird. If the access
> > should solely be used by introspection, then each type should have a
> > fixed access tied to it?
> 
> I think so, yes. Hence e.g. p2m_ram_ro and p2m_grant_map_r{w,o}.
> 
> >> That
> >> is, if e.g. a r/o direct-MMIO mapping is needed, this should not
> >> be expressed as (p2m_mmio_direct, p2m_access_r) tuple, but would
> >> require a distinct p2m_mmio_direct_ro type.
> > 
> > I guess we would then require a p2m_mmio_direct_ro,
> > p2m_mmio_direct_rwx and a p2m_mmio_direct_n at least, and ideally we
> > would need to differentiate the mandatory regions as present in ACPI
> > tables using yet different types.
> 
> What would we need p2m_mmio_direct_n for?

AMD can specify no access at all for certain regions on the ACPI
tables from what I've read on the manual (IW = IR = 0 in IVMD Flags).
AFAICT amd_iommu_reserve_domain_unity_map can already call
iommu_identity_mapping with access p2m_access_n and that would get
propagated into set_identity_p2m_entry.

> And what's the (present,
> not future) reason for the x in p2m_mmio_direct_rwx?

Mapped ROM BARs, but I'm also unsure we shouldn't just map MMIO with
execute permissions by default unless stated otherwise.

Thanks, Roger.


      reply	other threads:[~2021-09-23 15:33 UTC|newest]

Thread overview: 44+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-09-21  7:15 [PATCH v3 0/9] x86/PVH: Dom0 building adjustments Jan Beulich
2021-09-21  7:16 ` [PATCH v3 1/9] x86/PVH: improve Dom0 memory size calculation Jan Beulich
2021-09-22 11:59   ` Roger Pau Monné
2021-09-29 10:53     ` Jan Beulich
2021-09-21  7:17 ` [PATCH v3 2/9] x86/PV: properly set shadow allocation for Dom0 Jan Beulich
2021-09-22 13:01   ` Roger Pau Monné
2021-09-22 13:31   ` Andrew Cooper
2021-09-22 13:50     ` Jan Beulich
2021-09-22 14:25       ` Roger Pau Monné
2021-09-22 14:28         ` Jan Beulich
2021-09-21  7:17 ` [PATCH v3 3/9] x86/PVH: permit more physdevop-s to be used by Dom0 Jan Beulich
2021-09-22 14:22   ` Roger Pau Monné
2021-09-24 12:18     ` Jan Beulich
2021-09-21  7:18 ` [PATCH v3 4/9] x86/PVH: provide VGA console info to Dom0 Jan Beulich
2021-09-22 15:01   ` Roger Pau Monné
2021-09-22 17:03     ` Andrew Cooper
2021-09-23  9:58       ` Jan Beulich
2021-09-23  9:46     ` Jan Beulich
2021-09-23 13:22       ` Roger Pau Monné
2021-09-21  7:19 ` [PATCH v3 5/9] x86/PVH: actually show Dom0's register state from debug key '0' Jan Beulich
2021-09-22 15:48   ` Roger Pau Monné
2021-09-23 10:21     ` Jan Beulich
2021-09-23 14:27       ` Roger Pau Monné
2021-09-21  7:19 ` [PATCH v3 6/9] x86/HVM: convert hvm_virtual_to_linear_addr() to be remote-capable Jan Beulich
2021-09-23  8:09   ` Roger Pau Monné
2021-09-23 10:34     ` Jan Beulich
2021-09-23 14:28       ` Roger Pau Monné
2021-09-21  7:20 ` [PATCH v3 7/9] x86/PVH: actually show Dom0's stacks from debug key '0' Jan Beulich
2021-09-23 10:31   ` Roger Pau Monné
2021-09-23 10:38     ` Roger Pau Monné
2021-09-23 10:47     ` Jan Beulich
2021-09-23 14:43       ` Roger Pau Monné
2021-09-21  7:20 ` [PATCH v3 8/9] x86/HVM: skip offline vCPU-s when dumping VMCBs/VMCSes Jan Beulich
2021-09-23  8:23   ` Roger Pau Monné
2021-09-23 11:27     ` Jan Beulich
2021-09-23 14:46       ` Roger Pau Monné
2021-09-21  7:21 ` [PATCH v3 9/9] x86/P2M: relax permissions of PVH Dom0's MMIO entries Jan Beulich
2021-09-23 11:10   ` Roger Pau Monné
2021-09-23 11:32     ` Jan Beulich
2021-09-23 11:54       ` Roger Pau Monné
2021-09-23 12:15         ` Jan Beulich
2021-09-23 15:15           ` Roger Pau Monné
2021-09-23 15:22             ` Jan Beulich
2021-09-23 15:32               ` Roger Pau Monné [this message]

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