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From: Borislav Petkov <bp@alien8.de>
To: Tianyu Lan <ltykernel@gmail.com>
Cc: kys@microsoft.com, haiyangz@microsoft.com,
	sthemmin@microsoft.com, wei.liu@kernel.org, decui@microsoft.com,
	tglx@linutronix.de, mingo@redhat.com, x86@kernel.org,
	hpa@zytor.com, dave.hansen@linux.intel.com, luto@kernel.org,
	peterz@infradead.org, davem@davemloft.net, kuba@kernel.org,
	gregkh@linuxfoundation.org, arnd@arndb.de, brijesh.singh@amd.com,
	jroedel@suse.de, Tianyu.Lan@microsoft.com,
	thomas.lendacky@amd.com, pgonda@google.com,
	akpm@linux-foundation.org, rppt@kernel.org,
	kirill.shutemov@linux.intel.com, saravanand@fb.com,
	aneesh.kumar@linux.ibm.com, rientjes@google.com, tj@kernel.org,
	michael.h.kelley@microsoft.com, linux-arch@vger.kernel.org,
	linux-hyperv@vger.kernel.org, linux-kernel@vger.kernel.org,
	netdev@vger.kernel.org, vkuznets@redhat.com,
	konrad.wilk@oracle.com, hch@lst.de, robin.murphy@arm.com,
	joro@8bytes.org, parri.andrea@gmail.com, dave.hansen@intel.com
Subject: Re: [PATCH V6 5/8] x86/hyperv: Add Write/Read MSR registers via ghcb page
Date: Thu, 30 Sep 2021 20:20:37 +0200	[thread overview]
Message-ID: <YVX/9Xxxgy5D/Cvo@zn.tnic> (raw)
In-Reply-To: <20210930130545.1210298-6-ltykernel@gmail.com>

On Thu, Sep 30, 2021 at 09:05:41AM -0400, Tianyu Lan wrote:
> diff --git a/arch/x86/kernel/sev-shared.c b/arch/x86/kernel/sev-shared.c
> index 9f90f460a28c..dd7f37de640b 100644
> --- a/arch/x86/kernel/sev-shared.c
> +++ b/arch/x86/kernel/sev-shared.c
> @@ -94,10 +94,9 @@ static void vc_finish_insn(struct es_em_ctxt *ctxt)
>  	ctxt->regs->ip += ctxt->insn.length;
>  }
>  
> -static enum es_result sev_es_ghcb_hv_call(struct ghcb *ghcb,
> -					  struct es_em_ctxt *ctxt,
> -					  u64 exit_code, u64 exit_info_1,
> -					  u64 exit_info_2)
> +enum es_result sev_es_ghcb_hv_call_simple(struct ghcb *ghcb,
> +				   u64 exit_code, u64 exit_info_1,
> +				   u64 exit_info_2)

Align arguments on the opening brace.

Also, there's nothing "simple" about it - what you've carved out does
the actual HV call and the trailing part is verifying the HV info. So
that function should be called

__sev_es_ghcb_hv_call()

and the outer one without the "__".

>  {
>  	enum es_result ret;
>  
> @@ -109,29 +108,45 @@ static enum es_result sev_es_ghcb_hv_call(struct ghcb *ghcb,
>  	ghcb_set_sw_exit_info_1(ghcb, exit_info_1);
>  	ghcb_set_sw_exit_info_2(ghcb, exit_info_2);
>  
> -	sev_es_wr_ghcb_msr(__pa(ghcb));
>  	VMGEXIT();
>  
> -	if ((ghcb->save.sw_exit_info_1 & 0xffffffff) == 1) {
> -		u64 info = ghcb->save.sw_exit_info_2;
> -		unsigned long v;
> -
> -		info = ghcb->save.sw_exit_info_2;
> -		v = info & SVM_EVTINJ_VEC_MASK;
> -
> -		/* Check if exception information from hypervisor is sane. */
> -		if ((info & SVM_EVTINJ_VALID) &&
> -		    ((v == X86_TRAP_GP) || (v == X86_TRAP_UD)) &&
> -		    ((info & SVM_EVTINJ_TYPE_MASK) == SVM_EVTINJ_TYPE_EXEPT)) {
> -			ctxt->fi.vector = v;
> -			if (info & SVM_EVTINJ_VALID_ERR)
> -				ctxt->fi.error_code = info >> 32;
> -			ret = ES_EXCEPTION;
> -		} else {
> -			ret = ES_VMM_ERROR;
> -		}
> -	} else {
> +	if ((ghcb->save.sw_exit_info_1 & 0xffffffff) == 1)
> +		ret = ES_VMM_ERROR;
> +	else
>  		ret = ES_OK;
> +
> +	return ret;
> +}
> +
> +static enum es_result sev_es_ghcb_hv_call(struct ghcb *ghcb,
> +				   struct es_em_ctxt *ctxt,
> +				   u64 exit_code, u64 exit_info_1,
> +				   u64 exit_info_2)


Align arguments on the opening brace.

> +{
> +	unsigned long v;
> +	enum es_result ret;
> +	u64 info;
> +
> +	sev_es_wr_ghcb_msr(__pa(ghcb));
> +
> +	ret = sev_es_ghcb_hv_call_simple(ghcb, exit_code, exit_info_1,
> +					 exit_info_2);
> +	if (ret == ES_OK)
> +		return ret;
> +
> +	info = ghcb->save.sw_exit_info_2;
> +	v = info & SVM_EVTINJ_VEC_MASK;
> +
> +	/* Check if exception information from hypervisor is sane. */
> +	if ((info & SVM_EVTINJ_VALID) &&
> +	    ((v == X86_TRAP_GP) || (v == X86_TRAP_UD)) &&
> +	    ((info & SVM_EVTINJ_TYPE_MASK) == SVM_EVTINJ_TYPE_EXEPT)) {
> +		ctxt->fi.vector = v;
> +		if (info & SVM_EVTINJ_VALID_ERR)
> +			ctxt->fi.error_code = info >> 32;
> +		ret = ES_EXCEPTION;
> +	} else {
> +		ret = ES_VMM_ERROR;

Why do you need to assign ES_VMM_ERROR here again when you return it
above?

IOW, that else branch is not really needed.

-- 
Regards/Gruss,
    Boris.

https://people.kernel.org/tglx/notes-about-netiquette

  reply	other threads:[~2021-09-30 18:20 UTC|newest]

Thread overview: 20+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-09-30 13:05 [PATCH V6 0/8] x86/Hyper-V: Add Hyper-V Isolation VM support(First part) Tianyu Lan
2021-09-30 13:05 ` [PATCH V6 1/8] x86/hyperv: Initialize GHCB page in Isolation VM Tianyu Lan
2021-09-30 13:05 ` [PATCH V6 2/8] x86/hyperv: Initialize shared memory boundary in the " Tianyu Lan
2021-09-30 13:05 ` [PATCH V6 3/8] x86/hyperv: Add new hvcall guest address host visibility support Tianyu Lan
2021-09-30 18:02   ` Borislav Petkov
2021-10-01 13:17     ` Tianyu Lan
2021-09-30 13:05 ` [PATCH V6 4/8] Drivers: hv: vmbus: Mark vmbus ring buffer visible to host in Isolation VM Tianyu Lan
2021-09-30 13:05 ` [PATCH V6 5/8] x86/hyperv: Add Write/Read MSR registers via ghcb page Tianyu Lan
2021-09-30 18:20   ` Borislav Petkov [this message]
2021-10-01 13:31     ` Tianyu Lan
2021-09-30 18:27   ` Tom Lendacky
2021-09-30 18:33     ` Borislav Petkov
2021-10-01 13:44     ` Tianyu Lan
2021-09-30 18:34   ` Tom Lendacky
2021-09-30 13:05 ` [PATCH V6 6/8] x86/hyperv: Add ghcb hvcall support for SNP VM Tianyu Lan
2021-09-30 13:05 ` [PATCH V6 7/8] Drivers: hv: vmbus: Add SNP support for VMbus channel initiate message Tianyu Lan
2021-10-02 13:26   ` Michael Kelley
2021-10-02 14:39     ` Tianyu Lan
2021-10-04  2:39       ` Michael Kelley
2021-09-30 13:05 ` [PATCH V6 8/8] Drivers: hv : vmbus: Initialize VMbus ring buffer for Isolation VM Tianyu Lan

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