From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6EF2FC433EF for ; Fri, 1 Oct 2021 14:50:25 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 4B94A61A8A for ; Fri, 1 Oct 2021 14:50:25 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1354609AbhJAOwI (ORCPT ); Fri, 1 Oct 2021 10:52:08 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58752 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1354139AbhJAOwG (ORCPT ); Fri, 1 Oct 2021 10:52:06 -0400 Received: from mail-wm1-x32b.google.com (mail-wm1-x32b.google.com [IPv6:2a00:1450:4864:20::32b]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 465E4C061775 for ; Fri, 1 Oct 2021 07:50:22 -0700 (PDT) Received: by mail-wm1-x32b.google.com with SMTP id z2so7424544wmc.3 for ; Fri, 01 Oct 2021 07:50:22 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ffwll.ch; s=google; h=date:from:to:cc:subject:message-id:mail-followup-to:references :mime-version:content-disposition:content-transfer-encoding :in-reply-to; bh=XObjtU4PyVbF/ZbbwoSfuVLsd6n+GoMhRgnIczIDqqE=; b=g+tE4NGMt8NgHUTGaid9q2/e6/yn54CaeuKWN84VbR9vgKLRNepXvLoLL/MiAwIEJ4 dIxekSzimYn5iQCF1lDktkOpQrU1qCqtdxt9JQF74fWAeUzDyk2p5dt4QE5f22PgO2/o Wwk1wQsas67fVB6OOL4mzsqkgqtLrHFZhEiAA= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:date:from:to:cc:subject:message-id :mail-followup-to:references:mime-version:content-disposition :content-transfer-encoding:in-reply-to; bh=XObjtU4PyVbF/ZbbwoSfuVLsd6n+GoMhRgnIczIDqqE=; b=7WWz7Hmb8uxcX3yIUhMa/3EoFwLKgr1mWd7TdJY9TZtjkT9eyDRAY5MOGUOg7kYVl+ voZAd2qhDz9rIQJVPD9HB6FJdNJu6wOfegvKKrRxsnEGdWYjxGoSP+5bfgr8QreMC1Np 9qPTlBxArgFeBosbTzSecbb+9CKpmJkZfQlJdq2U1gA/GQsaLR2fEAW57bFa3FkRg+mX vpi0T6D91vBj3SBSL/dPyN80VL6N0IU/dUMoeN8ssllIwMWFhD/x03n/EVv+hGOtO3Sc L1J8JmLna/E3NztnQJL7T4J9ehQgzVyw1Y9uXooAfbCAwSmkS9cIYa7Y5ZePcIjSUnA5 n6dw== X-Gm-Message-State: AOAM533injNCPbaSjWIOG22dd4L/413H7/ycR4v8AVuSx1iQk6W1Wr3h 3DW8Ujpqfc/55GbjIdkRcgcmbQ== X-Google-Smtp-Source: ABdhPJw8T8GUVt7v4Ij+Ecdrg5qyP218Ix34mdcAMZ78zHjwhCBNKnCwsTQ9nfDW+q8et8Ml/yuf4Q== X-Received: by 2002:a05:600c:4e86:: with SMTP id f6mr5180927wmq.52.1633099820785; Fri, 01 Oct 2021 07:50:20 -0700 (PDT) Received: from phenom.ffwll.local ([2a02:168:57f4:0:efd0:b9e5:5ae6:c2fa]) by smtp.gmail.com with ESMTPSA id k10sm7821605wmr.32.2021.10.01.07.50.19 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 01 Oct 2021 07:50:20 -0700 (PDT) Date: Fri, 1 Oct 2021 16:50:18 +0200 From: Daniel Vetter To: Christophe JAILLET Cc: Cai Huoqing , Jani Nikula , Joonas Lahtinen , Rodrigo Vivi , David Airlie , Zhenyu Wang , Zhi Wang , intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, intel-gvt-dev@lists.freedesktop.org Subject: Re: [PATCH] drm/i915: Use direction definition DMA_BIDIRECTIONAL instead of PCI_DMA_BIDIRECTIONAL Message-ID: Mail-Followup-To: Christophe JAILLET , Cai Huoqing , Jani Nikula , Joonas Lahtinen , Rodrigo Vivi , David Airlie , Zhenyu Wang , Zhi Wang , intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, intel-gvt-dev@lists.freedesktop.org References: <20210925124613.144-1-caihuoqing@baidu.com> <3a2ada00-fe4f-284c-46a5-c0f6676bcfe1@wanadoo.fr> MIME-Version: 1.0 Content-Type: text/plain; charset=iso-8859-1 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <3a2ada00-fe4f-284c-46a5-c0f6676bcfe1@wanadoo.fr> X-Operating-System: Linux phenom 5.10.0-8-amd64 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu, Sep 30, 2021 at 08:58:15PM +0200, Christophe JAILLET wrote: > Le 30/09/2021 à 16:21, Daniel Vetter a écrit : > > On Sat, Sep 25, 2021 at 08:46:12PM +0800, Cai Huoqing wrote: > > > Replace direction definition PCI_DMA_BIDIRECTIONAL > > > with DMA_BIDIRECTIONAL, because it helps to enhance readability > > > and avoid possible inconsistency. > > > > > > Signed-off-by: Cai Huoqing > > > > Applied to drm-intel-gt-next, thanks for the patch. > > -Daniel > > Hi, > just in case, a similar patch received some (unrelated) comments a few weeks > ago. See [1]. > > Should it rings some bells to someone who know who knows what should be > done. > > Just my 2c. > > [1]: https://lore.kernel.org/kernel-janitors/0cd61d5b-ac88-31e8-99ad-143af480416f@arm.com/ Hm yeah there's some fishy stuff in here, but it's cc'ed to intel-gfx so should get picked up there. -Daniel > > CJ > > > > > > > --- > > > drivers/gpu/drm/i915/gt/intel_region_lmem.c | 4 ++-- > > > drivers/gpu/drm/i915/gvt/gtt.c | 17 ++++++++--------- > > > drivers/gpu/drm/i915/gvt/kvmgt.c | 4 ++-- > > > drivers/gpu/drm/i915/i915_gem_gtt.c | 4 ++-- > > > 4 files changed, 14 insertions(+), 15 deletions(-) > > > > > > diff --git a/drivers/gpu/drm/i915/gt/intel_region_lmem.c b/drivers/gpu/drm/i915/gt/intel_region_lmem.c > > > index a74b72f50cc9..afb35d2e5c73 100644 > > > --- a/drivers/gpu/drm/i915/gt/intel_region_lmem.c > > > +++ b/drivers/gpu/drm/i915/gt/intel_region_lmem.c > > > @@ -32,7 +32,7 @@ static int init_fake_lmem_bar(struct intel_memory_region *mem) > > > mem->remap_addr = dma_map_resource(i915->drm.dev, > > > mem->region.start, > > > mem->fake_mappable.size, > > > - PCI_DMA_BIDIRECTIONAL, > > > + DMA_BIDIRECTIONAL, > > > DMA_ATTR_FORCE_CONTIGUOUS); > > > if (dma_mapping_error(i915->drm.dev, mem->remap_addr)) { > > > drm_mm_remove_node(&mem->fake_mappable); > > > @@ -62,7 +62,7 @@ static void release_fake_lmem_bar(struct intel_memory_region *mem) > > > dma_unmap_resource(mem->i915->drm.dev, > > > mem->remap_addr, > > > mem->fake_mappable.size, > > > - PCI_DMA_BIDIRECTIONAL, > > > + DMA_BIDIRECTIONAL, > > > DMA_ATTR_FORCE_CONTIGUOUS); > > > } > > > diff --git a/drivers/gpu/drm/i915/gvt/gtt.c b/drivers/gpu/drm/i915/gvt/gtt.c > > > index e5c2fdfc20e3..53d0cb327539 100644 > > > --- a/drivers/gpu/drm/i915/gvt/gtt.c > > > +++ b/drivers/gpu/drm/i915/gvt/gtt.c > > > @@ -745,7 +745,7 @@ static void ppgtt_free_spt(struct intel_vgpu_ppgtt_spt *spt) > > > trace_spt_free(spt->vgpu->id, spt, spt->guest_page.type); > > > dma_unmap_page(kdev, spt->shadow_page.mfn << I915_GTT_PAGE_SHIFT, 4096, > > > - PCI_DMA_BIDIRECTIONAL); > > > + DMA_BIDIRECTIONAL); > > > radix_tree_delete(&spt->vgpu->gtt.spt_tree, spt->shadow_page.mfn); > > > @@ -849,7 +849,7 @@ static struct intel_vgpu_ppgtt_spt *ppgtt_alloc_spt( > > > */ > > > spt->shadow_page.type = type; > > > daddr = dma_map_page(kdev, spt->shadow_page.page, > > > - 0, 4096, PCI_DMA_BIDIRECTIONAL); > > > + 0, 4096, DMA_BIDIRECTIONAL); > > > if (dma_mapping_error(kdev, daddr)) { > > > gvt_vgpu_err("fail to map dma addr\n"); > > > ret = -EINVAL; > > > @@ -865,7 +865,7 @@ static struct intel_vgpu_ppgtt_spt *ppgtt_alloc_spt( > > > return spt; > > > err_unmap_dma: > > > - dma_unmap_page(kdev, daddr, PAGE_SIZE, PCI_DMA_BIDIRECTIONAL); > > > + dma_unmap_page(kdev, daddr, PAGE_SIZE, DMA_BIDIRECTIONAL); > > > err_free_spt: > > > free_spt(spt); > > > return ERR_PTR(ret); > > > @@ -2409,8 +2409,7 @@ static int alloc_scratch_pages(struct intel_vgpu *vgpu, > > > return -ENOMEM; > > > } > > > - daddr = dma_map_page(dev, virt_to_page(scratch_pt), 0, > > > - 4096, PCI_DMA_BIDIRECTIONAL); > > > + daddr = dma_map_page(dev, virt_to_page(scratch_pt), 0, 4096, DMA_BIDIRECTIONAL); > > > if (dma_mapping_error(dev, daddr)) { > > > gvt_vgpu_err("fail to dmamap scratch_pt\n"); > > > __free_page(virt_to_page(scratch_pt)); > > > @@ -2461,7 +2460,7 @@ static int release_scratch_page_tree(struct intel_vgpu *vgpu) > > > if (vgpu->gtt.scratch_pt[i].page != NULL) { > > > daddr = (dma_addr_t)(vgpu->gtt.scratch_pt[i].page_mfn << > > > I915_GTT_PAGE_SHIFT); > > > - dma_unmap_page(dev, daddr, 4096, PCI_DMA_BIDIRECTIONAL); > > > + dma_unmap_page(dev, daddr, 4096, DMA_BIDIRECTIONAL); > > > __free_page(vgpu->gtt.scratch_pt[i].page); > > > vgpu->gtt.scratch_pt[i].page = NULL; > > > vgpu->gtt.scratch_pt[i].page_mfn = 0; > > > @@ -2741,7 +2740,7 @@ int intel_gvt_init_gtt(struct intel_gvt *gvt) > > > } > > > daddr = dma_map_page(dev, virt_to_page(page), 0, > > > - 4096, PCI_DMA_BIDIRECTIONAL); > > > + 4096, DMA_BIDIRECTIONAL); > > > if (dma_mapping_error(dev, daddr)) { > > > gvt_err("fail to dmamap scratch ggtt page\n"); > > > __free_page(virt_to_page(page)); > > > @@ -2755,7 +2754,7 @@ int intel_gvt_init_gtt(struct intel_gvt *gvt) > > > ret = setup_spt_oos(gvt); > > > if (ret) { > > > gvt_err("fail to initialize SPT oos\n"); > > > - dma_unmap_page(dev, daddr, 4096, PCI_DMA_BIDIRECTIONAL); > > > + dma_unmap_page(dev, daddr, 4096, DMA_BIDIRECTIONAL); > > > __free_page(gvt->gtt.scratch_page); > > > return ret; > > > } > > > @@ -2779,7 +2778,7 @@ void intel_gvt_clean_gtt(struct intel_gvt *gvt) > > > dma_addr_t daddr = (dma_addr_t)(gvt->gtt.scratch_mfn << > > > I915_GTT_PAGE_SHIFT); > > > - dma_unmap_page(dev, daddr, 4096, PCI_DMA_BIDIRECTIONAL); > > > + dma_unmap_page(dev, daddr, 4096, DMA_BIDIRECTIONAL); > > > __free_page(gvt->gtt.scratch_page); > > > diff --git a/drivers/gpu/drm/i915/gvt/kvmgt.c b/drivers/gpu/drm/i915/gvt/kvmgt.c > > > index 7efa386449d1..20b82fb036f8 100644 > > > --- a/drivers/gpu/drm/i915/gvt/kvmgt.c > > > +++ b/drivers/gpu/drm/i915/gvt/kvmgt.c > > > @@ -328,7 +328,7 @@ static int gvt_dma_map_page(struct intel_vgpu *vgpu, unsigned long gfn, > > > return ret; > > > /* Setup DMA mapping. */ > > > - *dma_addr = dma_map_page(dev, page, 0, size, PCI_DMA_BIDIRECTIONAL); > > > + *dma_addr = dma_map_page(dev, page, 0, size, DMA_BIDIRECTIONAL); > > > if (dma_mapping_error(dev, *dma_addr)) { > > > gvt_vgpu_err("DMA mapping failed for pfn 0x%lx, ret %d\n", > > > page_to_pfn(page), ret); > > > @@ -344,7 +344,7 @@ static void gvt_dma_unmap_page(struct intel_vgpu *vgpu, unsigned long gfn, > > > { > > > struct device *dev = vgpu->gvt->gt->i915->drm.dev; > > > - dma_unmap_page(dev, dma_addr, size, PCI_DMA_BIDIRECTIONAL); > > > + dma_unmap_page(dev, dma_addr, size, DMA_BIDIRECTIONAL); > > > gvt_unpin_guest_page(vgpu, gfn, size); > > > } > > > diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c > > > index 36489be4896b..cd5f2348a187 100644 > > > --- a/drivers/gpu/drm/i915/i915_gem_gtt.c > > > +++ b/drivers/gpu/drm/i915/i915_gem_gtt.c > > > @@ -30,7 +30,7 @@ int i915_gem_gtt_prepare_pages(struct drm_i915_gem_object *obj, > > > do { > > > if (dma_map_sg_attrs(obj->base.dev->dev, > > > pages->sgl, pages->nents, > > > - PCI_DMA_BIDIRECTIONAL, > > > + DMA_BIDIRECTIONAL, > > > DMA_ATTR_SKIP_CPU_SYNC | > > > DMA_ATTR_NO_KERNEL_MAPPING | > > > DMA_ATTR_NO_WARN)) > > > @@ -64,7 +64,7 @@ void i915_gem_gtt_finish_pages(struct drm_i915_gem_object *obj, > > > usleep_range(100, 250); > > > dma_unmap_sg(i915->drm.dev, pages->sgl, pages->nents, > > > - PCI_DMA_BIDIRECTIONAL); > > > + DMA_BIDIRECTIONAL); > > > } > > > /** > > > -- > > > 2.25.1 > > > > > > -- Daniel Vetter Software Engineer, Intel Corporation http://blog.ffwll.ch From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 63A4DC433F5 for ; Fri, 1 Oct 2021 14:50:24 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 191C661A84 for ; Fri, 1 Oct 2021 14:50:24 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 mail.kernel.org 191C661A84 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=ffwll.ch Authentication-Results: mail.kernel.org; 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Fri, 01 Oct 2021 07:50:20 -0700 (PDT) Date: Fri, 1 Oct 2021 16:50:18 +0200 From: Daniel Vetter To: Christophe JAILLET Cc: Cai Huoqing , Jani Nikula , Joonas Lahtinen , Rodrigo Vivi , David Airlie , Zhenyu Wang , Zhi Wang , intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, intel-gvt-dev@lists.freedesktop.org Message-ID: Mail-Followup-To: Christophe JAILLET , Cai Huoqing , Jani Nikula , Joonas Lahtinen , Rodrigo Vivi , David Airlie , Zhenyu Wang , Zhi Wang , intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, intel-gvt-dev@lists.freedesktop.org References: <20210925124613.144-1-caihuoqing@baidu.com> <3a2ada00-fe4f-284c-46a5-c0f6676bcfe1@wanadoo.fr> MIME-Version: 1.0 Content-Type: text/plain; charset=iso-8859-1 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <3a2ada00-fe4f-284c-46a5-c0f6676bcfe1@wanadoo.fr> X-Operating-System: Linux phenom 5.10.0-8-amd64 Subject: Re: [Intel-gfx] [PATCH] drm/i915: Use direction definition DMA_BIDIRECTIONAL instead of PCI_DMA_BIDIRECTIONAL X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" On Thu, Sep 30, 2021 at 08:58:15PM +0200, Christophe JAILLET wrote: > Le 30/09/2021 à 16:21, Daniel Vetter a écrit : > > On Sat, Sep 25, 2021 at 08:46:12PM +0800, Cai Huoqing wrote: > > > Replace direction definition PCI_DMA_BIDIRECTIONAL > > > with DMA_BIDIRECTIONAL, because it helps to enhance readability > > > and avoid possible inconsistency. > > > > > > Signed-off-by: Cai Huoqing > > > > Applied to drm-intel-gt-next, thanks for the patch. > > -Daniel > > Hi, > just in case, a similar patch received some (unrelated) comments a few weeks > ago. See [1]. > > Should it rings some bells to someone who know who knows what should be > done. > > Just my 2c. > > [1]: https://lore.kernel.org/kernel-janitors/0cd61d5b-ac88-31e8-99ad-143af480416f@arm.com/ Hm yeah there's some fishy stuff in here, but it's cc'ed to intel-gfx so should get picked up there. -Daniel > > CJ > > > > > > > --- > > > drivers/gpu/drm/i915/gt/intel_region_lmem.c | 4 ++-- > > > drivers/gpu/drm/i915/gvt/gtt.c | 17 ++++++++--------- > > > drivers/gpu/drm/i915/gvt/kvmgt.c | 4 ++-- > > > drivers/gpu/drm/i915/i915_gem_gtt.c | 4 ++-- > > > 4 files changed, 14 insertions(+), 15 deletions(-) > > > > > > diff --git a/drivers/gpu/drm/i915/gt/intel_region_lmem.c b/drivers/gpu/drm/i915/gt/intel_region_lmem.c > > > index a74b72f50cc9..afb35d2e5c73 100644 > > > --- a/drivers/gpu/drm/i915/gt/intel_region_lmem.c > > > +++ b/drivers/gpu/drm/i915/gt/intel_region_lmem.c > > > @@ -32,7 +32,7 @@ static int init_fake_lmem_bar(struct intel_memory_region *mem) > > > mem->remap_addr = dma_map_resource(i915->drm.dev, > > > mem->region.start, > > > mem->fake_mappable.size, > > > - PCI_DMA_BIDIRECTIONAL, > > > + DMA_BIDIRECTIONAL, > > > DMA_ATTR_FORCE_CONTIGUOUS); > > > if (dma_mapping_error(i915->drm.dev, mem->remap_addr)) { > > > drm_mm_remove_node(&mem->fake_mappable); > > > @@ -62,7 +62,7 @@ static void release_fake_lmem_bar(struct intel_memory_region *mem) > > > dma_unmap_resource(mem->i915->drm.dev, > > > mem->remap_addr, > > > mem->fake_mappable.size, > > > - PCI_DMA_BIDIRECTIONAL, > > > + DMA_BIDIRECTIONAL, > > > DMA_ATTR_FORCE_CONTIGUOUS); > > > } > > > diff --git a/drivers/gpu/drm/i915/gvt/gtt.c b/drivers/gpu/drm/i915/gvt/gtt.c > > > index e5c2fdfc20e3..53d0cb327539 100644 > > > --- a/drivers/gpu/drm/i915/gvt/gtt.c > > > +++ b/drivers/gpu/drm/i915/gvt/gtt.c > > > @@ -745,7 +745,7 @@ static void ppgtt_free_spt(struct intel_vgpu_ppgtt_spt *spt) > > > trace_spt_free(spt->vgpu->id, spt, spt->guest_page.type); > > > dma_unmap_page(kdev, spt->shadow_page.mfn << I915_GTT_PAGE_SHIFT, 4096, > > > - PCI_DMA_BIDIRECTIONAL); > > > + DMA_BIDIRECTIONAL); > > > radix_tree_delete(&spt->vgpu->gtt.spt_tree, spt->shadow_page.mfn); > > > @@ -849,7 +849,7 @@ static struct intel_vgpu_ppgtt_spt *ppgtt_alloc_spt( > > > */ > > > spt->shadow_page.type = type; > > > daddr = dma_map_page(kdev, spt->shadow_page.page, > > > - 0, 4096, PCI_DMA_BIDIRECTIONAL); > > > + 0, 4096, DMA_BIDIRECTIONAL); > > > if (dma_mapping_error(kdev, daddr)) { > > > gvt_vgpu_err("fail to map dma addr\n"); > > > ret = -EINVAL; > > > @@ -865,7 +865,7 @@ static struct intel_vgpu_ppgtt_spt *ppgtt_alloc_spt( > > > return spt; > > > err_unmap_dma: > > > - dma_unmap_page(kdev, daddr, PAGE_SIZE, PCI_DMA_BIDIRECTIONAL); > > > + dma_unmap_page(kdev, daddr, PAGE_SIZE, DMA_BIDIRECTIONAL); > > > err_free_spt: > > > free_spt(spt); > > > return ERR_PTR(ret); > > > @@ -2409,8 +2409,7 @@ static int alloc_scratch_pages(struct intel_vgpu *vgpu, > > > return -ENOMEM; > > > } > > > - daddr = dma_map_page(dev, virt_to_page(scratch_pt), 0, > > > - 4096, PCI_DMA_BIDIRECTIONAL); > > > + daddr = dma_map_page(dev, virt_to_page(scratch_pt), 0, 4096, DMA_BIDIRECTIONAL); > > > if (dma_mapping_error(dev, daddr)) { > > > gvt_vgpu_err("fail to dmamap scratch_pt\n"); > > > __free_page(virt_to_page(scratch_pt)); > > > @@ -2461,7 +2460,7 @@ static int release_scratch_page_tree(struct intel_vgpu *vgpu) > > > if (vgpu->gtt.scratch_pt[i].page != NULL) { > > > daddr = (dma_addr_t)(vgpu->gtt.scratch_pt[i].page_mfn << > > > I915_GTT_PAGE_SHIFT); > > > - dma_unmap_page(dev, daddr, 4096, PCI_DMA_BIDIRECTIONAL); > > > + dma_unmap_page(dev, daddr, 4096, DMA_BIDIRECTIONAL); > > > __free_page(vgpu->gtt.scratch_pt[i].page); > > > vgpu->gtt.scratch_pt[i].page = NULL; > > > vgpu->gtt.scratch_pt[i].page_mfn = 0; > > > @@ -2741,7 +2740,7 @@ int intel_gvt_init_gtt(struct intel_gvt *gvt) > > > } > > > daddr = dma_map_page(dev, virt_to_page(page), 0, > > > - 4096, PCI_DMA_BIDIRECTIONAL); > > > + 4096, DMA_BIDIRECTIONAL); > > > if (dma_mapping_error(dev, daddr)) { > > > gvt_err("fail to dmamap scratch ggtt page\n"); > > > __free_page(virt_to_page(page)); > > > @@ -2755,7 +2754,7 @@ int intel_gvt_init_gtt(struct intel_gvt *gvt) > > > ret = setup_spt_oos(gvt); > > > if (ret) { > > > gvt_err("fail to initialize SPT oos\n"); > > > - dma_unmap_page(dev, daddr, 4096, PCI_DMA_BIDIRECTIONAL); > > > + dma_unmap_page(dev, daddr, 4096, DMA_BIDIRECTIONAL); > > > __free_page(gvt->gtt.scratch_page); > > > return ret; > > > } > > > @@ -2779,7 +2778,7 @@ void intel_gvt_clean_gtt(struct intel_gvt *gvt) > > > dma_addr_t daddr = (dma_addr_t)(gvt->gtt.scratch_mfn << > > > I915_GTT_PAGE_SHIFT); > > > - dma_unmap_page(dev, daddr, 4096, PCI_DMA_BIDIRECTIONAL); > > > + dma_unmap_page(dev, daddr, 4096, DMA_BIDIRECTIONAL); > > > __free_page(gvt->gtt.scratch_page); > > > diff --git a/drivers/gpu/drm/i915/gvt/kvmgt.c b/drivers/gpu/drm/i915/gvt/kvmgt.c > > > index 7efa386449d1..20b82fb036f8 100644 > > > --- a/drivers/gpu/drm/i915/gvt/kvmgt.c > > > +++ b/drivers/gpu/drm/i915/gvt/kvmgt.c > > > @@ -328,7 +328,7 @@ static int gvt_dma_map_page(struct intel_vgpu *vgpu, unsigned long gfn, > > > return ret; > > > /* Setup DMA mapping. */ > > > - *dma_addr = dma_map_page(dev, page, 0, size, PCI_DMA_BIDIRECTIONAL); > > > + *dma_addr = dma_map_page(dev, page, 0, size, DMA_BIDIRECTIONAL); > > > if (dma_mapping_error(dev, *dma_addr)) { > > > gvt_vgpu_err("DMA mapping failed for pfn 0x%lx, ret %d\n", > > > page_to_pfn(page), ret); > > > @@ -344,7 +344,7 @@ static void gvt_dma_unmap_page(struct intel_vgpu *vgpu, unsigned long gfn, > > > { > > > struct device *dev = vgpu->gvt->gt->i915->drm.dev; > > > - dma_unmap_page(dev, dma_addr, size, PCI_DMA_BIDIRECTIONAL); > > > + dma_unmap_page(dev, dma_addr, size, DMA_BIDIRECTIONAL); > > > gvt_unpin_guest_page(vgpu, gfn, size); > > > } > > > diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c > > > index 36489be4896b..cd5f2348a187 100644 > > > --- a/drivers/gpu/drm/i915/i915_gem_gtt.c > > > +++ b/drivers/gpu/drm/i915/i915_gem_gtt.c > > > @@ -30,7 +30,7 @@ int i915_gem_gtt_prepare_pages(struct drm_i915_gem_object *obj, > > > do { > > > if (dma_map_sg_attrs(obj->base.dev->dev, > > > pages->sgl, pages->nents, > > > - PCI_DMA_BIDIRECTIONAL, > > > + DMA_BIDIRECTIONAL, > > > DMA_ATTR_SKIP_CPU_SYNC | > > > DMA_ATTR_NO_KERNEL_MAPPING | > > > DMA_ATTR_NO_WARN)) > > > @@ -64,7 +64,7 @@ void i915_gem_gtt_finish_pages(struct drm_i915_gem_object *obj, > > > usleep_range(100, 250); > > > dma_unmap_sg(i915->drm.dev, pages->sgl, pages->nents, > > > - PCI_DMA_BIDIRECTIONAL); > > > + DMA_BIDIRECTIONAL); > > > } > > > /** > > > -- > > > 2.25.1 > > > > > > -- Daniel Vetter Software Engineer, Intel Corporation http://blog.ffwll.ch