On Wed, Dec 22, 2021 at 07:40:19AM +0100, Cédric le Goater wrote:
> Use a QEMU log primitive for errors and trace events for debug.
> 
> Signed-off-by: Cédric Le Goater <clg@kaod.org>

Reviewed-by: David Gibson <david@gibson.drobear.id.au>

> ---
>  hw/ppc/mpc8544_guts.c |  9 ++++++---
>  hw/ppc/ppc4xx_devs.c  | 39 +++++++++++----------------------------
>  hw/ppc/ppc4xx_pci.c   | 11 +++++++----
>  hw/ppc/trace-events   |  5 +++++
>  4 files changed, 29 insertions(+), 35 deletions(-)
> 
> diff --git a/hw/ppc/mpc8544_guts.c b/hw/ppc/mpc8544_guts.c
> index e8d2d51c20c0..a26e83d0484b 100644
> --- a/hw/ppc/mpc8544_guts.c
> +++ b/hw/ppc/mpc8544_guts.c
> @@ -19,6 +19,7 @@
>  
>  #include "qemu/osdep.h"
>  #include "qemu/module.h"
> +#include "qemu/log.h"
>  #include "sysemu/runstate.h"
>  #include "cpu.h"
>  #include "hw/sysbus.h"
> @@ -82,7 +83,9 @@ static uint64_t mpc8544_guts_read(void *opaque, hwaddr addr,
>          value = env->spr[SPR_E500_SVR];
>          break;
>      default:
> -        fprintf(stderr, "guts: Unknown register read: %x\n", (int)addr);
> +        qemu_log_mask(LOG_GUEST_ERROR,
> +                      "%s: Unknown register 0x%" HWADDR_PRIx "\n",
> +                      __func__, addr);
>          break;
>      }
>  
> @@ -101,8 +104,8 @@ static void mpc8544_guts_write(void *opaque, hwaddr addr,
>          }
>          break;
>      default:
> -        fprintf(stderr, "guts: Unknown register write: %x = %x\n",
> -                (int)addr, (unsigned)value);
> +        qemu_log_mask(LOG_GUEST_ERROR, "%s: Unknown register 0x%" HWADDR_PRIx
> +                       " = 0x%" PRIx64 "\n", __func__, addr, value);
>          break;
>      }
>  }
> diff --git a/hw/ppc/ppc4xx_devs.c b/hw/ppc/ppc4xx_devs.c
> index 980c48944fc7..e7d82ae5016c 100644
> --- a/hw/ppc/ppc4xx_devs.c
> +++ b/hw/ppc/ppc4xx_devs.c
> @@ -35,14 +35,7 @@
>  #include "exec/address-spaces.h"
>  #include "qemu/error-report.h"
>  #include "qapi/error.h"
> -
> -/*#define DEBUG_UIC*/
> -
> -#ifdef DEBUG_UIC
> -#  define LOG_UIC(...) qemu_log_mask(CPU_LOG_INT, ## __VA_ARGS__)
> -#else
> -#  define LOG_UIC(...) do { } while (0)
> -#endif
> +#include "trace.h"
>  
>  static void ppc4xx_reset(void *opaque)
>  {
> @@ -137,8 +130,9 @@ static uint32_t sdram_bcr (hwaddr ram_base,
>          bcr = 0x000C0000;
>          break;
>      default:
> -        printf("%s: invalid RAM size " TARGET_FMT_plx "\n", __func__,
> -               ram_size);
> +        qemu_log_mask(LOG_GUEST_ERROR,
> +                      "%s: invalid RAM size 0x%" HWADDR_PRIx "\n", __func__,
> +                      ram_size);
>          return 0x00000000;
>      }
>      bcr |= ram_base & 0xFF800000;
> @@ -171,10 +165,8 @@ static void sdram_set_bcr(ppc4xx_sdram_t *sdram, int i,
>  {
>      if (sdram->bcr[i] & 0x00000001) {
>          /* Unmap RAM */
> -#ifdef DEBUG_SDRAM
> -        printf("%s: unmap RAM area " TARGET_FMT_plx " " TARGET_FMT_lx "\n",
> -               __func__, sdram_base(sdram->bcr[i]), sdram_size(sdram->bcr[i]));
> -#endif
> +        trace_ppc4xx_sdram_unmap(sdram_base(sdram->bcr[i]),
> +                                 sdram_size(sdram->bcr[i]));
>          memory_region_del_subregion(get_system_memory(),
>                                      &sdram->containers[i]);
>          memory_region_del_subregion(&sdram->containers[i],
> @@ -183,10 +175,7 @@ static void sdram_set_bcr(ppc4xx_sdram_t *sdram, int i,
>      }
>      sdram->bcr[i] = bcr & 0xFFDEE001;
>      if (enabled && (bcr & 0x00000001)) {
> -#ifdef DEBUG_SDRAM
> -        printf("%s: Map RAM area " TARGET_FMT_plx " " TARGET_FMT_lx "\n",
> -               __func__, sdram_base(bcr), sdram_size(bcr));
> -#endif
> +        trace_ppc4xx_sdram_unmap(sdram_base(bcr), sdram_size(bcr));
>          memory_region_init(&sdram->containers[i], NULL, "sdram-containers",
>                             sdram_size(bcr));
>          memory_region_add_subregion(&sdram->containers[i], 0,
> @@ -216,10 +205,8 @@ static void sdram_unmap_bcr (ppc4xx_sdram_t *sdram)
>      int i;
>  
>      for (i = 0; i < sdram->nbanks; i++) {
> -#ifdef DEBUG_SDRAM
> -        printf("%s: Unmap RAM area " TARGET_FMT_plx " " TARGET_FMT_lx "\n",
> -               __func__, sdram_base(sdram->bcr[i]), sdram_size(sdram->bcr[i]));
> -#endif
> +        trace_ppc4xx_sdram_unmap(sdram_base(sdram->bcr[i]),
> +                                 sdram_size(sdram->bcr[i]));
>          memory_region_del_subregion(get_system_memory(),
>                                      &sdram->ram_memories[i]);
>      }
> @@ -316,16 +303,12 @@ static void dcr_write_sdram (void *opaque, int dcrn, uint32_t val)
>          case 0x20: /* SDRAM_CFG */
>              val &= 0xFFE00000;
>              if (!(sdram->cfg & 0x80000000) && (val & 0x80000000)) {
> -#ifdef DEBUG_SDRAM
> -                printf("%s: enable SDRAM controller\n", __func__);
> -#endif
> +                trace_ppc4xx_sdram_enable("enable");
>                  /* validate all RAM mappings */
>                  sdram_map_bcr(sdram);
>                  sdram->status &= ~0x80000000;
>              } else if ((sdram->cfg & 0x80000000) && !(val & 0x80000000)) {
> -#ifdef DEBUG_SDRAM
> -                printf("%s: disable SDRAM controller\n", __func__);
> -#endif
> +                trace_ppc4xx_sdram_enable("disable");
>                  /* invalidate all RAM mappings */
>                  sdram_unmap_bcr(sdram);
>                  sdram->status |= 0x80000000;
> diff --git a/hw/ppc/ppc4xx_pci.c b/hw/ppc/ppc4xx_pci.c
> index 304a29349c2e..5df97e6d156f 100644
> --- a/hw/ppc/ppc4xx_pci.c
> +++ b/hw/ppc/ppc4xx_pci.c
> @@ -20,6 +20,7 @@
>   * 4xx SoCs, such as the 440EP. */
>  
>  #include "qemu/osdep.h"
> +#include "qemu/log.h"
>  #include "hw/irq.h"
>  #include "hw/ppc/ppc.h"
>  #include "hw/ppc/ppc4xx.h"
> @@ -152,8 +153,9 @@ static void ppc4xx_pci_reg_write4(void *opaque, hwaddr offset,
>          break;
>  
>      default:
> -        printf("%s: unhandled PCI internal register 0x%lx\n", __func__,
> -               (unsigned long)offset);
> +        qemu_log_mask(LOG_GUEST_ERROR,
> +                     "%s: unhandled PCI internal register 0x%" HWADDR_PRIx "\n",
> +                     __func__, offset);
>          break;
>      }
>  }
> @@ -218,8 +220,9 @@ static uint64_t ppc4xx_pci_reg_read4(void *opaque, hwaddr offset,
>          break;
>  
>      default:
> -        printf("%s: invalid PCI internal register 0x%lx\n", __func__,
> -               (unsigned long)offset);
> +        qemu_log_mask(LOG_GUEST_ERROR,
> +                      "%s: invalid PCI internal register 0x%" HWADDR_PRIx "\n",
> +                      __func__, offset);
>          value = 0;
>      }
>  
> diff --git a/hw/ppc/trace-events b/hw/ppc/trace-events
> index ada644652d94..0c55aa501471 100644
> --- a/hw/ppc/trace-events
> +++ b/hw/ppc/trace-events
> @@ -164,3 +164,8 @@ ppc4xx_gpt_init(uint64_t addr) "offet 0x%" PRIx64
>  
>  ppc405ep_clocks_compute(const char *param, uint32_t param2, uint32_t val) "%s 0x%1" PRIx32 " %d"
>  ppc405ep_clocks_setup(const char *trace) "%s"
> +
> +# ppc4xx_devs.c
> +ppc4xx_sdram_enable(const char *trace) "%s SDRAM controller"
> +ppc4xx_sdram_unmap(uint64_t addr, uint64_t size) "Unmap RAM area 0x%" PRIx64 " size 0x%" PRIx64
> +ppc4xx_sdram_map(uint64_t addr, uint64_t size) "Map RAM area 0x%" PRIx64 " size 0x%" PRIx64

-- 
David Gibson			| I'll have my music baroque, and my code
david AT gibson.dropbear.id.au	| minimalist, thank you.  NOT _the_ _other_
				| _way_ _around_!
http://www.ozlabs.org/~dgibson