Re: [PATCH v7 05/10] x86/vmx: Add Intel Processor Trace support

From: Andrew Cooper <andrew.cooper3@citrix.com>
To: Jan Beulich <jbeulich@suse.com>
Cc: "Michał Leszczyński" <michal.leszczynski@cert.pl>,
	"Roger Pau Monné" <roger.pau@citrix.com>, "Wei Liu" <wl@xen.org>,
	"Jun Nakajima" <jun.nakajima@intel.com>,
	"Kevin Tian" <kevin.tian@intel.com>,
	"Tamas K Lengyel" <tamas@tklengyel.com>,
	Xen-devel <xen-devel@lists.xenproject.org>
Subject: Re: [PATCH v7 05/10] x86/vmx: Add Intel Processor Trace support
Date: Fri, 29 Jan 2021 22:08:06 +0000	[thread overview]
Message-ID: <a77e3a2a-2935-3ad8-b45a-4c4b82b78091@citrix.com> (raw)
In-Reply-To: <9fa8ff47-cd09-a09b-6d62-bb47f72c3847@suse.com>

On 26/01/2021 13:35, Jan Beulich wrote:
> On 21.01.2021 22:27, Andrew Cooper wrote:
>> --- a/xen/include/asm-x86/msr.h
>> +++ b/xen/include/asm-x86/msr.h
>> @@ -306,6 +306,38 @@ struct vcpu_msrs
>>          };
>>      } misc_features_enables;
>>  
>> +    /*
>> +     * 0x00000560 ... 57x - MSR_RTIT_*
>> +     *
>> +     * "Real Time Instruction Trace", now called Processor Trace.
>> +     *
>> +     * These MSRs are not exposed to guests.  They are controlled by Xen
>> +     * behind the scenes, when vmtrace is enabled for the domain.
>> +     *
>> +     * MSR_RTIT_OUTPUT_BASE not stored here.  It is fixed per vcpu, and
>> +     * derived from v->vmtrace.buf.
>> +     */
>> +    struct {
>> +        /*
>> +         * Placed in the MSR load/save lists.  Only modified by hypercall in
>> +         * the common case.
>> +         */
>> +        uint64_t ctl;
> IIUC this field will be used by subsequent patches only?

Correct.

~Andrew