From: Mikulas Patocka <mpatocka@redhat.com>
To: Arnd Bergmann <arnd@arndb.de>
Cc: Richard Henderson <rth@twiddle.net>,
Ivan Kokshaysky <ink@jurassic.park.msu.ru>,
Matt Turner <mattst88@gmail.com>,
Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
alpha <linux-alpha@vger.kernel.org>,
linux-serial@vger.kernel.org, linux-rtc@vger.kernel.org
Subject: Re: [PATCH 1/2 v3] alpha: add a delay to inb_p, inb_w and inb_l
Date: Thu, 7 May 2020 10:09:33 -0400 (EDT) [thread overview]
Message-ID: <alpine.LRH.2.02.2005070931280.1718@file01.intranet.prod.int.rdu2.redhat.com> (raw)
In-Reply-To: <CAK8P3a1qN-cpzkcdtNhtMfSwWwxqcOYg9x6DEzt7PWazwr8V=Q@mail.gmail.com>
On Thu, 7 May 2020, Arnd Bergmann wrote:
> On Thu, May 7, 2020 at 10:06 AM Mikulas Patocka <mpatocka@redhat.com> wrote:
> > On Wed, 6 May 2020, Mikulas Patocka wrote:
> > > On Wed, 6 May 2020, Arnd Bergmann wrote:
> > > > On Wed, May 6, 2020 at 1:21 PM Mikulas Patocka <mpatocka@redhat.com> wrote:
> > > >
> > > > > /*
> > > > > * The yet supported machines all access the RTC index register via
> > > > > * an ISA port access but the way to access the date register differs ...
> > > > > + *
> > > > > + * The ISA bus on Alpha Avanti doesn't like back-to-back accesses,
> > > > > + * we need to add a small delay.
> > > > > */
> > > > > #define CMOS_READ(addr) ({ \
> > > > > outb_p((addr),RTC_PORT(0)); \
> > > > > +udelay(2); \
> > > > > inb_p(RTC_PORT(1)); \
> > > >
> > > >
> > > > The inb_p() / outb_p() functions are meant to already have a delay in them,
> > > > maybe we should just add it there for alpha?
> > > >
> > > > Arnd
> > >
> > > Yes, that is possible too - it fixes the real time clock hang for me.
> > >
> > >
> > > -#define inb_p inb
> > > -#define inw_p inw
> > > -#define inl_p inl
> > > +#define inb_p(x) (ndelay(300), inb(x))
> > > +#define inw_p(x) (ndelay(300), inw(x))
> > > +#define inl_p(x) (ndelay(300), inl(x))
> > > #define outb_p outb
> > > #define outw_p outw
> > > #define outl_p outl
> >
> > 300ns was too low. We need at least 1400ns to fix the hang reliably.
>
> Are you sure that it is in fact the timing that is important here and not
> a barrier? I see that inb() is written in terms of readb(), but the
> barrier requirements for I/O space are a bit different from those
> on PCI memory space.
The "in" and "out" instructions are serializing on x86. But alpha doesn't
have dedicated instructions for accessing ports.
Do you think that all the "in[bwl]" and "out[bwl]" macros on alpha should
be protected by two memory barriers, to emulate the x86 behavior?
> In the example you gave first, there is a an outb_p() followed by inb_p().
> These are normally serialized by the bus, but I/O space also has the
> requirement that an outb() completes before we get to the next
> instruction (non-posted write), while writeb() is generally posted and
> only needs a barrier before the write rather than both before and after
> like outb.
>
> Arnd
I think that the fact that "writeb" is posted is exactly the problem - it
gets posted, the processor goes on, sends "readb" and they arrive
back-to-back to the ISA bus. The ISA bus device doesn't like back-to-back
accesses and locks up.
Anyway - you can change the "ndelay()" function in this patch to "mb()" -
"mb()" will provide long enough delay that it fixes this bug.
Mikulas
next prev parent reply other threads:[~2020-05-07 14:09 UTC|newest]
Thread overview: 45+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-05-06 11:21 [PATCH 1/2] alpha: add a delay between RTC port write and read Mikulas Patocka
2020-05-06 14:20 ` Arnd Bergmann
2020-05-06 17:12 ` [PATCH 1/2 v2] alpha: add a delay to inb_p, inb_w and inb_l Mikulas Patocka
2020-05-07 8:06 ` [PATCH 1/2 v3] " Mikulas Patocka
2020-05-07 8:20 ` Greg Kroah-Hartman
2020-05-07 10:53 ` Mikulas Patocka
2020-05-07 13:30 ` Arnd Bergmann
2020-05-07 14:09 ` Mikulas Patocka [this message]
2020-05-07 15:08 ` Arnd Bergmann
2020-05-07 15:45 ` Mikulas Patocka
2020-05-07 15:46 ` [PATCH v4] alpha: add a barrier after outb, outw and outl Mikulas Patocka
2020-05-07 19:12 ` Arnd Bergmann
2020-05-10 1:27 ` Maciej W. Rozycki
2020-05-10 1:25 ` [PATCH 1/2 v3] alpha: add a delay to inb_p, inb_w and inb_l Maciej W. Rozycki
2020-05-10 18:50 ` Mikulas Patocka
2020-05-11 14:58 ` Maciej W. Rozycki
2020-05-12 19:35 ` Mikulas Patocka
2020-05-13 14:41 ` Ivan Kokshaysky
2020-05-13 16:13 ` Greg Kroah-Hartman
2020-05-13 17:17 ` Maciej W. Rozycki
2020-05-22 13:03 ` Mikulas Patocka
2020-05-22 13:37 ` Maciej W. Rozycki
2020-05-22 13:26 ` Mikulas Patocka
2020-05-22 20:00 ` Mikulas Patocka
2020-05-23 10:26 ` [PATCH v4] alpha: fix memory barriers so that they conform to the specification Mikulas Patocka
2020-05-23 15:10 ` Ivan Kokshaysky
2020-05-23 15:34 ` Mikulas Patocka
2020-05-23 15:37 ` [PATCH v5] " Mikulas Patocka
2020-05-24 14:54 ` Maciej W. Rozycki
2020-05-25 13:56 ` Mikulas Patocka
2020-05-25 14:07 ` Arnd Bergmann
2020-05-25 14:45 ` Maciej W. Rozycki
2020-05-25 15:53 ` [PATCH v6] " Mikulas Patocka
2020-05-26 14:47 ` [PATCH v7] " Mikulas Patocka
2020-05-27 0:18 ` Maciej W. Rozycki
2020-06-08 6:58 ` Mikulas Patocka
2020-06-08 23:49 ` Matt Turner
2020-05-25 15:54 ` [PATCH v5] " Mikulas Patocka
2020-05-25 16:39 ` Maciej W. Rozycki
2020-05-26 14:48 ` Mikulas Patocka
2020-05-27 0:23 ` Maciej W. Rozycki
2020-05-23 16:44 ` [PATCH v4] " Maciej W. Rozycki
2020-05-23 17:09 ` Mikulas Patocka
2020-05-23 19:27 ` Maciej W. Rozycki
2020-05-23 20:11 ` Mikulas Patocka
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