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[83.35.24.118]) by smtp.gmail.com with ESMTPSA id z133sm18756983wmc.45.2021.09.25.02.54.20 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Sat, 25 Sep 2021 02:54:20 -0700 (PDT) Message-ID: Date: Sat, 25 Sep 2021 11:54:19 +0200 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.1.0 Subject: Re: [PATCH v5 09/30] tcg/loongarch64: Implement tcg_out_mov and tcg_out_movi Content-Language: en-US To: WANG Xuerui , qemu-devel@nongnu.org References: <20210924172527.904294-1-git@xen0n.name> <20210924172527.904294-10-git@xen0n.name> From: =?UTF-8?Q?Philippe_Mathieu-Daud=c3=a9?= In-Reply-To: <20210924172527.904294-10-git@xen0n.name> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Received-SPF: pass client-ip=2a00:1450:4864:20::434; envelope-from=philippe.mathieu.daude@gmail.com; helo=mail-wr1-x434.google.com X-Spam_score_int: -14 X-Spam_score: -1.5 X-Spam_bar: - X-Spam_report: (-1.5 / 5.0 requ) BAYES_00=-1.9, CTE_8BIT_MISMATCH=0.034, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FORGED_FROMDOMAIN=0.249, FREEMAIL_FROM=0.001, HEADER_FROM_DIFFERENT_DOMAINS=0.248, NICE_REPLY_A=-0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Richard Henderson , Laurent Vivier Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" On 9/24/21 19:25, WANG Xuerui wrote: > Signed-off-by: WANG Xuerui > Reviewed-by: Richard Henderson > --- > tcg/loongarch64/tcg-target.c.inc | 109 +++++++++++++++++++++++++++++++ > 1 file changed, 109 insertions(+) > +/* Loads a 32-bit immediate into rd, sign-extended. */ > +static void tcg_out_movi_i32(TCGContext *s, TCGReg rd, int32_t val) > +{ > + /* Single-instruction cases. */ > + tcg_target_long lo = sextreg(val, 0, 12); > + if (lo == val) { > + /* val fits in simm12: addi.w rd, zero, val */ > + tcg_out_opc_addi_w(s, rd, TCG_REG_ZERO, val); > + return; > + } > + if (0x800 <= val && val <= 0xfff) { > + /* val fits in uimm12: ori rd, zero, val */ > + tcg_out_opc_ori(s, rd, TCG_REG_ZERO, val); > + return; > + } > + > + /* High bits must be set; load with lu12i.w + optional ori. */ > + tcg_target_long hi12 = sextreg(val, 12, 20); Please declare variables in function prologue. Maybe name lo12 and hi20? > + tcg_out_opc_lu12i_w(s, rd, hi12); > + if (lo != 0) { > + tcg_out_opc_ori(s, rd, rd, lo & 0xfff); Isn't lo already 12-bit? Why the mask? > + } > +} > + > +static void tcg_out_movi(TCGContext *s, TCGType type, TCGReg rd, > + tcg_target_long val) > +{ > + if (type == TCG_TYPE_I32 || val == (int32_t)val) { > + tcg_out_movi_i32(s, rd, val); > + return; > + } > + > + /* PC-relative cases. */ > + intptr_t pc_offset = tcg_pcrel_diff(s, (void *)val); Declare in prologue. > + if (pc_offset == sextreg(pc_offset, 0, 22) && (pc_offset & 3) == 0) { > + /* Single pcaddu2i. */ > + tcg_out_opc_pcaddu2i(s, rd, pc_offset >> 2); > + return; > + } > + > + if (pc_offset == (int32_t)pc_offset) { > + /* Offset within 32 bits; load with pcalau12i + ori. */ > + tcg_target_long lo = sextreg(val, 0, 12); Name this 'val_lo' similarly to val_hi? > + tcg_target_long pc_hi = (val - pc_offset) >> 12; > + tcg_target_long val_hi = val >> 12; > + tcg_target_long offset_hi = val_hi - pc_hi; > + tcg_debug_assert(offset_hi == sextreg(offset_hi, 0, 20)); > + tcg_out_opc_pcalau12i(s, rd, offset_hi); > + if (lo != 0) { > + tcg_out_opc_ori(s, rd, rd, lo & 0xfff); Again, lo is already 12-bit. > + } > + return; > + } > + > + /* Single cu52i.d case. */ > + if (ctz64(val) >= 52) { > + tcg_out_opc_cu52i_d(s, rd, TCG_REG_ZERO, val >> 52); > + return; > + } > + > + /* Slow path. Initialize the low 32 bits, then concat high bits. */ > + tcg_out_movi_i32(s, rd, val); > + > + bool rd_high_bits_are_ones = (int32_t)val < 0; Declare in prologue, however this is hard to read. KISS: rd_high_bits_are_ones = (int32_t)val < 0 ? true : false; > + tcg_target_long hi32 = sextreg(val, 32, 20); By 'hi32' I expect the 32 high bits. Maybe explicit as hi32_20? > + tcg_target_long hi52 = sextreg(val, 52, 12); And hi52_12? > + > + if (imm_part_needs_loading(rd_high_bits_are_ones, hi32)) { > + tcg_out_opc_cu32i_d(s, rd, hi32); > + rd_high_bits_are_ones = hi32 < 0; Again KISS: if (hi32 < 0) { rd_high_bits_are_ones = true; } > + } > + > + if (imm_part_needs_loading(rd_high_bits_are_ones, hi52)) { > + tcg_out_opc_cu52i_d(s, rd, rd, hi52); > + } > +} With comment addressed: Reviewed-by: Philippe Mathieu-Daudé