From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751514AbdH1Ltf (ORCPT ); Mon, 28 Aug 2017 07:49:35 -0400 Received: from lelnx193.ext.ti.com ([198.47.27.77]:58198 "EHLO lelnx193.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751422AbdH1Ltb (ORCPT ); Mon, 28 Aug 2017 07:49:31 -0400 Subject: Re: [PATCH v3 2/5] dmaengine: Add STM32 DMAMUX driver To: Pierre Yves MORDRET , Vinod Koul References: <1499343623-5964-1-git-send-email-pierre-yves.mordret@st.com> <1499343623-5964-3-git-send-email-pierre-yves.mordret@st.com> <20170722065133.GT3053@localhost> <2b916330-9b65-f4d5-817f-79b66cc236b3@st.com> <20170726052930.GF3053@localhost> <20170731123157.GJ3053@localhost> <20170802045522.GU3053@localhost> <7d2091fe-a2e5-78bb-b63d-9cb66bdb7e84@ti.com> <7bcad698-fa1a-3dc2-e918-4400639ca6d7@st.com> <47ceba83-1097-072e-bed6-d1964bce7a25@ti.com> <0e16a519-3d60-f683-5517-12a520e0e521@st.com> <71b7ef2a-d745-d16b-4538-567c856cce9a@st.com> <401305f0-15d8-1996-60d6-69c13cbacc06@ti.com> <58bf2f7c-faf1-d1e9-3c87-d7964d1ba3d4@st.com> <6e8e19f1-8d0f-183b-e02f-1ec8c4dd57b3@ti.com> CC: Mark Rutland , "devicetree@vger.kernel.org" , Amelie DELAUNAY , Alexandre TORGUE , Russell King , Fabien DESSENNE , "linux-kernel@vger.kernel.org" , "dmaengine@vger.kernel.org" , Rob Herring , Maxime Coquelin , "M'boumba Cedric Madianga" , Dan Williams , Fabrice GASNIER , "linux-arm-kernel@lists.infradead.org" , Herbert Xu From: Peter Ujfalusi Message-ID: Date: Mon, 28 Aug 2017 14:48:50 +0300 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:45.0) Gecko/20100101 Thunderbird/45.8.0 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset="utf-8" X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: 8bit X-MIME-Autoconverted: from quoted-printable to 8bit by nfs id v7SBnfZO023009  Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki. Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki On 2017-08-24 16:03, Pierre Yves MORDRET wrote: > Please tell me whether I'm wrong but for am335x/am437x both DMA Channels and > events are given by DT. I believe IP Spec provides the mapping for the channel > (this is what you call fixed channel) and DMA router event is selected randomly > within the DT. In our eDMA the channel number and the DMA event number is locked together. Event 17 can only be serviced by eDMA channel 17. The am335x/am437x DMA crossbar is implemented on every DMA event lane and by changing it you can select different event to be routed to the given event number. The eDMA can handle up to 64 unique DMA events, however for each of this 64 events we have a crossbar which allows to select from up to 63 other sources. I can not allocate the eDMA channel in the crossbar as I can not be sure that I will not step on some other driver's toe and take a channel (event) which someone want to use with it's default purpose. So the binding includes the channel number and the crossbar mapped event ID. Oh, and this eDMA limitation is the main source of my hassle with the mem-to-mem channel: in DT we must tell what channels can be used for memcpy - the ones that are not used on the board (usually we pick i2c since we don't support DMA with that). > As for dra7 events comes from DT but channel is selected though out local > algorithm. IP Spec defines DMA event muxer mapping. Here it is again a different story. The crossbar in dra7 can handle 256 incoming events and it can map any of these events to the 64 eDMA event number (or channel) or if it is front of the sDMA we can select the sDMA event number from the 128 it can handle. Here we only use the event number in the crossbar node as we will pick the eDMA event, which is going to be correspond to the eDMA channel. > At my opinion my router is more closed to dra7. IP Spec defines event mapping. > Nonetheless the DMA has a fixed allocated mapping. Using DMA alone DT has to > provide channel number. In router mode this number doesn't matter since router > makes the routing from fixed event to channel. However router needs to know > which channel will be assign to event: any random channel is allowed. In dra7 both eDMA and sDMA have pre-allocated channel mapping. Before my DMA event router support we had no way to use non default mapped events (we did had DMA support fro HSMMC and probably other stuff with direct DMA node). When I had the DMA router, first I added the node for it, then I have converted all existing nodes to use the DMA event router node for the DMA binding. After that I could add the nodes for the peripherals needing non default mapped DMA requests. We don't allow direct DMA binding for dra7 class of devices at all, everything needs to go via the xbars. I would not bother with mixed use case here, I would just make it mandatory to go via the router. Again, with the eDMA I needed to 'mask' out the events/channels which we want to use for memcpy. Define the memcpy channels in the eDMA node and mask the same events in the crossbar as well. > I'm pretty sure I can mimic what has been for DRA7 related to DMA Channel > allocation however it seems to be this is aside DMA engine. This kind of > implementation forbid the use of DMA and DMA router at the same time : I > remember you already raise the point. If a DMA channel is requested DMA router > is not aware of this allocation. This is the idea of my custom API which relies > on get_any_slave_channel(). I think you must not allow mixed use for the slave channels. The none slave (memcpy) is still a pain, but you have managed it somehow in the past. > Using DT to assign channel seems not a good idea either as I lost router's benefice. > > BTW I need the channel ID within router. Your use case is pretty close to the dra7 one we have. > Looking at core or of_dma_router_xlate() I don't really know how to do it a > generic manner. You construct the dmaspec for the DMA, which will include the channel number you have mapped the event to. If the DMA driver needs the channel number _and_ the event number then both, but based on your description your DMA engine itself is close to the eDMA of ours than the sDMA. - Péter From mboxrd@z Thu Jan 1 00:00:00 1970 From: Peter Ujfalusi Subject: Re: [PATCH v3 2/5] dmaengine: Add STM32 DMAMUX driver Date: Mon, 28 Aug 2017 14:48:50 +0300 Message-ID: References: <1499343623-5964-1-git-send-email-pierre-yves.mordret@st.com> <1499343623-5964-3-git-send-email-pierre-yves.mordret@st.com> <20170722065133.GT3053@localhost> <2b916330-9b65-f4d5-817f-79b66cc236b3@st.com> <20170726052930.GF3053@localhost> <20170731123157.GJ3053@localhost> <20170802045522.GU3053@localhost> <7d2091fe-a2e5-78bb-b63d-9cb66bdb7e84@ti.com> <7bcad698-fa1a-3dc2-e918-4400639ca6d7@st.com> <47ceba83-1097-072e-bed6-d1964bce7a25@ti.com> <0e16a519-3d60-f683-5517-12a520e0e521@st.com> <71b7ef2a-d745-d16b-4538-567c856cce9a@st.com> <401305f0-15d8-1996-60d6-69c13cbacc06@ti.com> <58bf2f7c-faf1-d1e9-3c87-d7964d1ba3d4@st.com> <6e8e19f1-8d0f-183b-e02f-1ec8c4dd57b3@ti.com> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Return-path: In-Reply-To: Sender: devicetree-owner-u79uwXL29TY76Z2rM5mHXA@public.gmane.org To: Pierre Yves MORDRET , Vinod Koul Cc: Mark Rutland , "devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org" , Amelie DELAUNAY , Alexandre TORGUE , Russell King , Fabien DESSENNE , "linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org" , "dmaengine-u79uwXL29TY76Z2rM5mHXA@public.gmane.org" , Rob Herring , Maxime Coquelin , M'boumba Cedric Madianga , Dan Williams , Fabrice GASNIER , "linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org" , Herbert Xu List-Id: devicetree@vger.kernel.org =EF=BB=BF Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki. Y-tunnus/Bu= siness ID: 0615521-4. Kotipaikka/Domicile: Helsinki On 2017-08-24 16:03, Pierre Yves MORDRET wrote: > Please tell me whether I'm wrong but for am335x/am437x both DMA Channels = and > events are given by DT. I believe IP Spec provides the mapping for the ch= annel > (this is what you call fixed channel) and DMA router event is selected ra= ndomly > within the DT. In our eDMA the channel number and the DMA event number is locked together. Event 17 can only be serviced by eDMA channel 17. The am335x/am437x DMA crossbar is implemented on every DMA event lane and by changing it you can select different event to be routed to the given event number. The eDMA can handle up to 64 unique DMA events, however for each of this 64 events we have a crossbar which allows to select from up to 63 other sources. I can not allocate the eDMA channel in the crossbar as I can not be sure that I will not step on some other driver's toe and take a channel (event) which someone want to use with it's default purpose. So the binding includes the channel number and the crossbar mapped event ID. Oh, and this eDMA limitation is the main source of my hassle with the mem-to-mem channel: in DT we must tell what channels can be used for memcpy - the ones that are not used on the board (usually we pick i2c since we don't support DMA with that). > As for dra7 events comes from DT but channel is selected though out local > algorithm. IP Spec defines DMA event muxer mapping. Here it is again a different story. The crossbar in dra7 can handle 256 incoming events and it can map any of these events to the 64 eDMA event number (or channel) or if it is front of the sDMA we can select the sDMA event number from the 128 it can handle. Here we only use the event number in the crossbar node as we will pick the eDMA event, which is going to be correspond to the eDMA channel. > At my opinion my router is more closed to dra7. IP Spec defines event map= ping. > Nonetheless the DMA has a fixed allocated mapping. Using DMA alone DT has= to > provide channel number. In router mode this number doesn't matter since r= outer > makes the routing from fixed event to channel. However router needs to kn= ow > which channel will be assign to event: any random channel is allowed. In dra7 both eDMA and sDMA have pre-allocated channel mapping. Before my DMA event router support we had no way to use non default mapped events (we did had DMA support fro HSMMC and probably other stuff with direct DMA node). When I had the DMA router, first I added the node for it, then I have converted all existing nodes to use the DMA event router node for the DMA binding. After that I could add the nodes for the peripherals needing non default mapped DMA requests. We don't allow direct DMA binding for dra7 class of devices at all, everything needs to go via the xbars. I would not bother with mixed use case here, I would just make it mandatory to go via the router. Again, with the eDMA I needed to 'mask' out the events/channels which we want to use for memcpy. Define the memcpy channels in the eDMA node and mask the same events in the crossbar as well. > I'm pretty sure I can mimic what has been for DRA7 related to DMA Channel > allocation however it seems to be this is aside DMA engine. This kind of > implementation forbid the use of DMA and DMA router at the same time : I > remember you already raise the point. If a DMA channel is requested DMA r= outer > is not aware of this allocation. This is the idea of my custom API which = relies > on get_any_slave_channel(). I think you must not allow mixed use for the slave channels. The none slave (memcpy) is still a pain, but you have managed it somehow in the past= . > Using DT to assign channel seems not a good idea either as I lost router'= s benefice. >=20 > BTW I need the channel ID within router. Your use case is pretty close to the dra7 one we have. > Looking at core or of_dma_router_xlate() I don't really know how to do it= a > generic manner. You construct the dmaspec for the DMA, which will include the channel number you have mapped the event to. If the DMA driver needs the channel number _and_ the event number then both, but based on your description your DMA engine itself is close to the eDMA of ours than the sDMA. - P=C3=A9ter -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org More majordomo info at http://vger.kernel.org/majordomo-info.html From mboxrd@z Thu Jan 1 00:00:00 1970 From: peter.ujfalusi@ti.com (Peter Ujfalusi) Date: Mon, 28 Aug 2017 14:48:50 +0300 Subject: [PATCH v3 2/5] dmaengine: Add STM32 DMAMUX driver In-Reply-To: References: <1499343623-5964-1-git-send-email-pierre-yves.mordret@st.com> <1499343623-5964-3-git-send-email-pierre-yves.mordret@st.com> <20170722065133.GT3053@localhost> <2b916330-9b65-f4d5-817f-79b66cc236b3@st.com> <20170726052930.GF3053@localhost> <20170731123157.GJ3053@localhost> <20170802045522.GU3053@localhost> <7d2091fe-a2e5-78bb-b63d-9cb66bdb7e84@ti.com> <7bcad698-fa1a-3dc2-e918-4400639ca6d7@st.com> <47ceba83-1097-072e-bed6-d1964bce7a25@ti.com> <0e16a519-3d60-f683-5517-12a520e0e521@st.com> <71b7ef2a-d745-d16b-4538-567c856cce9a@st.com> <401305f0-15d8-1996-60d6-69c13cbacc06@ti.com> <58bf2f7c-faf1-d1e9-3c87-d7964d1ba3d4@st.com> <6e8e19f1-8d0f-183b-e02f-1ec8c4dd57b3@ti.com> Message-ID: To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org ? Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki. Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki On 2017-08-24 16:03, Pierre Yves MORDRET wrote: > Please tell me whether I'm wrong but for am335x/am437x both DMA Channels and > events are given by DT. I believe IP Spec provides the mapping for the channel > (this is what you call fixed channel) and DMA router event is selected randomly > within the DT. In our eDMA the channel number and the DMA event number is locked together. Event 17 can only be serviced by eDMA channel 17. The am335x/am437x DMA crossbar is implemented on every DMA event lane and by changing it you can select different event to be routed to the given event number. The eDMA can handle up to 64 unique DMA events, however for each of this 64 events we have a crossbar which allows to select from up to 63 other sources. I can not allocate the eDMA channel in the crossbar as I can not be sure that I will not step on some other driver's toe and take a channel (event) which someone want to use with it's default purpose. So the binding includes the channel number and the crossbar mapped event ID. Oh, and this eDMA limitation is the main source of my hassle with the mem-to-mem channel: in DT we must tell what channels can be used for memcpy - the ones that are not used on the board (usually we pick i2c since we don't support DMA with that). > As for dra7 events comes from DT but channel is selected though out local > algorithm. IP Spec defines DMA event muxer mapping. Here it is again a different story. The crossbar in dra7 can handle 256 incoming events and it can map any of these events to the 64 eDMA event number (or channel) or if it is front of the sDMA we can select the sDMA event number from the 128 it can handle. Here we only use the event number in the crossbar node as we will pick the eDMA event, which is going to be correspond to the eDMA channel. > At my opinion my router is more closed to dra7. IP Spec defines event mapping. > Nonetheless the DMA has a fixed allocated mapping. Using DMA alone DT has to > provide channel number. In router mode this number doesn't matter since router > makes the routing from fixed event to channel. However router needs to know > which channel will be assign to event: any random channel is allowed. In dra7 both eDMA and sDMA have pre-allocated channel mapping. Before my DMA event router support we had no way to use non default mapped events (we did had DMA support fro HSMMC and probably other stuff with direct DMA node). When I had the DMA router, first I added the node for it, then I have converted all existing nodes to use the DMA event router node for the DMA binding. After that I could add the nodes for the peripherals needing non default mapped DMA requests. We don't allow direct DMA binding for dra7 class of devices at all, everything needs to go via the xbars. I would not bother with mixed use case here, I would just make it mandatory to go via the router. Again, with the eDMA I needed to 'mask' out the events/channels which we want to use for memcpy. Define the memcpy channels in the eDMA node and mask the same events in the crossbar as well. > I'm pretty sure I can mimic what has been for DRA7 related to DMA Channel > allocation however it seems to be this is aside DMA engine. This kind of > implementation forbid the use of DMA and DMA router at the same time : I > remember you already raise the point. If a DMA channel is requested DMA router > is not aware of this allocation. This is the idea of my custom API which relies > on get_any_slave_channel(). I think you must not allow mixed use for the slave channels. The none slave (memcpy) is still a pain, but you have managed it somehow in the past. > Using DT to assign channel seems not a good idea either as I lost router's benefice. > > BTW I need the channel ID within router. Your use case is pretty close to the dra7 one we have. > Looking at core or of_dma_router_xlate() I don't really know how to do it a > generic manner. You construct the dmaspec for the DMA, which will include the channel number you have mapped the event to. If the DMA driver needs the channel number _and_ the event number then both, but based on your description your DMA engine itself is close to the eDMA of ours than the sDMA. - P?ter