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From: Mikko Perttunen <cyndis@kapsi.fi>
To: Dipen Patel <dipenp@nvidia.com>,
	robh+dt@kernel.org, thierry.reding@gmail.com,
	jonathanh@nvidia.com, mperttunen@nvidia.com
Cc: linux-tegra@vger.kernel.org
Subject: Re: [PATCH] arm64: tegra: Wrong hsp_aon reg property size
Date: Thu, 10 Sep 2020 11:27:06 +0300	[thread overview]
Message-ID: <bcf4c638-164a-1465-a0d4-17c64cbe0576@kapsi.fi> (raw)
In-Reply-To: <20200910070950.12941-1-dipenp@nvidia.com>

On 9/10/20 10:09 AM, Dipen Patel wrote:
> The hsp_aon node reg property size 0xa0000 will overlap with other
> resources. This patch fixes that wrong value with correct size 0x90000.
> 
> Signed-off-by: Dipen Patel <dipenp@nvidia.com>
> 
> Fixes: a38570c22e9d ("arm64: tegra: Add nodes for TCU on Tegra194")

I think there shouldn't be a newline between Signed-off-by and Fixes; 
otherwise,

Reviewed-by: Mikko Perttunen <mperttunen@nvidia.com>

> ---
>   arch/arm64/boot/dts/nvidia/tegra194.dtsi | 2 +-
>   1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/arch/arm64/boot/dts/nvidia/tegra194.dtsi b/arch/arm64/boot/dts/nvidia/tegra194.dtsi
> index e9c90f0f44ff..93438d2b9469 100644
> --- a/arch/arm64/boot/dts/nvidia/tegra194.dtsi
> +++ b/arch/arm64/boot/dts/nvidia/tegra194.dtsi
> @@ -1161,7 +1161,7 @@
>   
>   		hsp_aon: hsp@c150000 {
>   			compatible = "nvidia,tegra194-hsp", "nvidia,tegra186-hsp";
> -			reg = <0x0c150000 0xa0000>;
> +			reg = <0x0c150000 0x90000>;
>   			interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>,
>   			             <GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>,
>   			             <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>,
> 

  reply	other threads:[~2020-09-10  8:27 UTC|newest]

Thread overview: 3+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-09-10  7:09 [PATCH] arm64: tegra: Wrong hsp_aon reg property size Dipen Patel
2020-09-10  8:27 ` Mikko Perttunen [this message]
2020-09-11 21:40   ` Dipen Patel

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