(In reply to Alex Deucher from comment #90)
> (In reply to Nicolas Werner from comment #89)
> > (In reply to Alex Deucher from comment #88)
> > > Created attachment 115774 [details] [review] [review] [review] [review]
> > > add some debugging output
> > > 
> > > Can you attach your dmesg output with this patch attached?  It should help
> > > narrow down where the dpcd info is getting corrupted.
> > 
> > Here it is (only the relevant section):
> > [    5.534907] [drm] radeon_dp_getdpcd
> > [    5.534913] [drm] DPCD: 11 0a 84 01 00 0b 01 01 02 00 00 00 00 00 00
> > [    5.565816] [drm] fb mappable at 0xD047B000
> > [    5.565823] [drm] vram apper at 0xD0000000
> > [    5.565825] [drm] size 8294400
> > [    5.565828] [drm] fb depth is 24
> > [    5.565830] [drm]    pitch is 7680
> > [    5.566022] fbcon: radeondrmfb (fb0) is primary device
> > [    5.566093] [drm] radeon_dp_set_link_config, 270000, 2
> > [    5.566095] [drm] DPCD: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
> 
> Are you still hardcoding the lanes here?
> 
> 
> > [    6.706063] [drm] radeon_dp_set_rx_power_state, 0
> > [    6.706065] [drm] DPCD: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
> > [    7.843201] [drm] radeon_dp_link_train
> > [    7.843203] [drm] DPCD: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
> > [    7.843204] [drm] dp_info dpcd: 00 00 00 00 00 00 00 00 00 00 00 00 00 00
> > 00
> > [    7.843206] [drm] radeon_dp_set_rx_power_state, 0
> > [    7.843206] [drm] DPCD: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

Yes, I wouldn't get a working display otherwise, should I try without it?