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[142.114.143.47]) by smtp.gmail.com with ESMTPSA id s7sm961807qkp.105.2021.08.12.09.54.53 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 12 Aug 2021 09:54:53 -0700 (PDT) Message-ID: Subject: Re: [PATCH v7 09/10] hw/arm/virt: add ITS support in virt GIC From: shashi.mallela@linaro.org To: Igor Mammedov Date: Thu, 12 Aug 2021 12:54:52 -0400 In-Reply-To: <20210806130937.1a354b30@redhat.com> References: <20210805223002.144855-1-shashi.mallela@linaro.org> <20210805223002.144855-10-shashi.mallela@linaro.org> <20210806130937.1a354b30@redhat.com> Content-Type: text/plain; charset="UTF-8" X-Mailer: Evolution 3.28.5 (3.28.5-16.el8) Mime-Version: 1.0 Content-Transfer-Encoding: 7bit Received-SPF: pass client-ip=2607:f8b0:4864:20::834; envelope-from=shashi.mallela@linaro.org; helo=mail-qt1-x834.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, mst@redhat.com, rad@semihalf.com, qemu-devel@nongnu.org, eric.auger@redhat.com, qemu-arm@nongnu.org, leif@nuviainc.com Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" On Fri, 2021-08-06 at 13:09 +0200, Igor Mammedov wrote: > On Thu, 5 Aug 2021 18:30:01 -0400 > Shashi Mallela wrote: > > > Included creation of ITS as part of virt platform GIC > > initialization. This Emulated ITS model now co-exists with kvm > > ITS and is enabled in absence of kvm irq kernel support in a > > platform. > > > > Signed-off-by: Shashi Mallela > > Reviewed-by: Peter Maydell > > --- > > hw/arm/virt.c | 28 ++++++++++++++++++++++++++-- > > include/hw/arm/virt.h | 2 ++ > > target/arm/kvm_arm.h | 4 ++-- > > 3 files changed, 30 insertions(+), 4 deletions(-) > > > > diff --git a/hw/arm/virt.c b/hw/arm/virt.c > > index 81eda46b0b..99cf4f9dbd 100644 > > --- a/hw/arm/virt.c > > +++ b/hw/arm/virt.c > > @@ -583,6 +583,12 @@ static void create_its(VirtMachineState *vms) > > const char *itsclass = its_class_name(); > > DeviceState *dev; > > > > + if (!strcmp(itsclass, "arm-gicv3-its")) { > > + if (!vms->tcg_its) { > > + itsclass = NULL; > > + } > > + } > > + > > if (!itsclass) { > > /* Do nothing if not supported */ > > return; > > @@ -620,7 +626,7 @@ static void create_v2m(VirtMachineState *vms) > > vms->msi_controller = VIRT_MSI_CTRL_GICV2M; > > } > > > > -static void create_gic(VirtMachineState *vms) > > +static void create_gic(VirtMachineState *vms, MemoryRegion *mem) > > { > > MachineState *ms = MACHINE(vms); > > /* We create a standalone GIC */ > > @@ -654,6 +660,14 @@ static void create_gic(VirtMachineState *vms) > > nb_redist_regions); > > qdev_prop_set_uint32(vms->gic, "redist-region-count[0]", > > redist0_count); > > > > + if (!kvm_irqchip_in_kernel()) { > > + if (vms->tcg_its) { > > + object_property_set_link(OBJECT(vms->gic), > > "sysmem", > > + OBJECT(mem), > > &error_fatal); > > + qdev_prop_set_bit(vms->gic, "has-lpi", true); > > + } > > + } > > + > > if (nb_redist_regions == 2) { > > uint32_t redist1_capacity = > > vms->memmap[VIRT_HIGH_GIC_REDIST2].size / > > GICV3_REDIST_SIZE; > > @@ -2043,7 +2057,7 @@ static void machvirt_init(MachineState > > *machine) > > > > virt_flash_fdt(vms, sysmem, secure_sysmem ?: sysmem); > > > > - create_gic(vms); > > + create_gic(vms, sysmem); > > > > virt_cpu_post_init(vms, sysmem); > > > > @@ -2746,6 +2760,12 @@ static void virt_instance_init(Object *obj) > > } else { > > /* Default allows ITS instantiation */ > > vms->its = true; > > + > > + if (vmc->no_tcg_its) { > > + vms->tcg_its = false; > > + } else { > > + vms->tcg_its = true; > > + } > > } > > > > /* Default disallows iommu instantiation */ > > @@ -2795,8 +2815,12 @@ DEFINE_VIRT_MACHINE_AS_LATEST(6, 1) > > > > static void virt_machine_6_0_options(MachineClass *mc) > > { > > + VirtMachineClass *vmc = VIRT_MACHINE_CLASS(OBJECT_CLASS(mc)); > > + > > virt_machine_6_1_options(mc); > > compat_props_add(mc->compat_props, hw_compat_6_0, > > hw_compat_6_0_len); > > + /* qemu ITS was introduced with 6.1 */ > > + vmc->no_tcg_its = true; > > given it's not going to be in 6.1, shouldn't it be moved to > virt_machine_6_1_options() with updated comment? Agreed,moved to virt_machine_6_1_options() and updated comment > > > } > > DEFINE_VIRT_MACHINE(6, 0) > > > > diff --git a/include/hw/arm/virt.h b/include/hw/arm/virt.h > > index 9661c46699..b461b8d261 100644 > > --- a/include/hw/arm/virt.h > > +++ b/include/hw/arm/virt.h > > @@ -120,6 +120,7 @@ struct VirtMachineClass { > > MachineClass parent; > > bool disallow_affinity_adjustment; > > bool no_its; > > + bool no_tcg_its; > > bool no_pmu; > > bool claim_edge_triggered_timers; > > bool smbios_old_sys_ver; > > @@ -141,6 +142,7 @@ struct VirtMachineState { > > bool highmem; > > bool highmem_ecam; > > bool its; > > + bool tcg_its; > > bool virt; > > bool ras; > > bool mte; > > diff --git a/target/arm/kvm_arm.h b/target/arm/kvm_arm.h > > index 34f8daa377..0613454975 100644 > > --- a/target/arm/kvm_arm.h > > +++ b/target/arm/kvm_arm.h > > @@ -525,8 +525,8 @@ static inline const char *its_class_name(void) > > /* KVM implementation requires this capability */ > > return kvm_direct_msi_enabled() ? "arm-its-kvm" : NULL; > > } else { > > - /* Software emulation is not implemented yet */ > > - return NULL; > > + /* Software emulation based model */ > > + return "arm-gicv3-its"; > > } > > } > >