From: Richard Henderson <richard.henderson@linaro.org>
To: Peter Maydell <peter.maydell@linaro.org>
Cc: qemu-arm <qemu-arm@nongnu.org>, QEMU Developers <qemu-devel@nongnu.org>
Subject: Re: [PATCH v2 8/8] tests/tcg: Add arm and aarch64 pc alignment tests
Date: Fri, 27 Aug 2021 21:04:24 -0700 [thread overview]
Message-ID: <d7fe267b-154b-8d96-1b27-1c696b1a030d@linaro.org> (raw)
In-Reply-To: <CAFEAcA8Vf-mF4xpMkv+Xc6Cc-u1fW5yW1-fHwVSFqZ6EKNdmPA@mail.gmail.com>
On 8/26/21 6:54 AM, Peter Maydell wrote:
> On Sat, 21 Aug 2021 at 21:09, Richard Henderson
> <richard.henderson@linaro.org> wrote:
>
>> + /*
>> + * From v8, it is CONSTRAINED UNPREDICTABLE whether BXWritePC aligns
>> + * the address or not. If so, we can legitimately fall through.
>> + */
>> + return EXIT_SUCCESS;
>> +}
>
> Can we get the test harness to run the test on a cortex-a9 guest CPU
> so we can avoid the UNPREDICTABLE and can always check the signal
> happened ? The test is a bit weak if it doesn't actually test that
> we take an exception...
Well, it'll always raise an exception under qemu.
I wrote it this way so that it would also always succeed when run on real hardware. Even
then, I have no specific knowledge of a cpu that does not raise an exception, but I only
tested cortex-a57.
r~
next prev parent reply other threads:[~2021-08-28 4:05 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-08-21 19:59 [PATCH v2 0/8] target/arm: Fix insn exception priorities Richard Henderson
2021-08-21 19:59 ` [PATCH v2 1/8] target/arm: Take an exception if PSTATE.IL is set Richard Henderson
2021-08-21 19:59 ` [PATCH v2 2/8] target/arm: Merge disas_a64_insn into aarch64_tr_translate_insn Richard Henderson
2021-08-21 19:59 ` [PATCH v2 3/8] linux-user/aarch64: Handle EC_PCALIGNMENT Richard Henderson
2021-08-26 13:27 ` Peter Maydell
2021-08-21 19:59 ` [PATCH v2 4/8] linux-user/arm: Report SIGBUS and SIGSEGV correctly Richard Henderson
2021-08-26 13:31 ` Peter Maydell
2021-09-08 9:19 ` Richard Henderson
2021-09-19 22:23 ` Richard Henderson
2021-08-21 19:59 ` [PATCH v2 5/8] target/arm: Take an exception if PC is misaligned Richard Henderson
2021-08-26 13:45 ` Peter Maydell
2021-09-20 1:29 ` Richard Henderson
2021-09-20 8:08 ` Peter Maydell
2021-09-20 13:29 ` Richard Henderson
2021-08-21 19:59 ` [PATCH v2 6/8] target/arm: Assert thumb pc is aligned Richard Henderson
2021-08-21 20:46 ` Philippe Mathieu-Daudé
2021-09-19 22:34 ` Richard Henderson
2021-08-26 13:46 ` Peter Maydell
2021-08-21 19:59 ` [PATCH v2 7/8] target/arm: Suppress bp for exceptions with more priority Richard Henderson
2021-08-21 19:59 ` [PATCH v2 8/8] tests/tcg: Add arm and aarch64 pc alignment tests Richard Henderson
2021-08-26 13:54 ` Peter Maydell
2021-08-28 4:04 ` Richard Henderson [this message]
2021-09-13 13:29 ` [PATCH v2 0/8] target/arm: Fix insn exception priorities Peter Maydell
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=d7fe267b-154b-8d96-1b27-1c696b1a030d@linaro.org \
--to=richard.henderson@linaro.org \
--cc=peter.maydell@linaro.org \
--cc=qemu-arm@nongnu.org \
--cc=qemu-devel@nongnu.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.