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From: Julien Grall <julien.grall@arm.com>
To: Andrii Anisov <andrii.anisov@gmail.com>
Cc: "xen-devel@lists.xenproject.org" <xen-devel@lists.xenproject.org>,
	nd <nd@arm.com>, Andrii Anisov <andrii_anisov@epam.com>,
	Stefano Stabellini <sstabellini@kernel.org>,
	Andre Przywara <andre.przywara@arm.com>
Subject: Re: [Xen-devel] [RFC 01/16] xen/arm: Re-enable interrupt later in the trap path
Date: Tue, 30 Jul 2019 21:46:38 +0100	[thread overview]
Message-ID: <e1ee3ca4-edff-1a62-1f0a-0b832b4d5924@arm.com> (raw)
In-Reply-To: <b7b24214-f7d0-41d0-b2c7-286d45f6da1a@gmail.com>

(+ Andre)

On 7/30/19 6:34 PM, Andrii Anisov wrote:
> Hello Julien,
> 
> It looks I missed answering this email. So do this now:
> 
> On 29.11.18 00:00, Julien Grall wrote:
>> On 28/11/2018 21:31, Andrii Anisov wrote:
>>> From: Julien Grall <julien.grall@arm.com>
>>>
>>> This makes function enter_hypervisor_head() being executed with
>>> irqs locked. This also give a fine side effect - it assures that
>>> LRs are cleared prior to any IRQs processing, which leads to a
>>> better (faster) IRQs processing.
>>
>> Again, this need some rationale why is it faster. And how this is going
>> to impact the other vGIC...
> 
> With the current code, there is a chance that hypervisor performs 
> do_IRQ() before fetching LRs with the information about IRQs being 
> processed by a guest. This could happen in guest trap paths where 
> interrupts are enabled before `enter_hypervisor_head()` call.
> 
> Performing `do_IRQ()` prior to `vgic_sync_from_lrs()` is assumed as less 
> efficient than doing it vice versa for high IRQ rate use-cases with the 
> number of different interrupts (specific for multimedia scenarios).

What you suggest here is really specific to your use case. However, 
think about the Real-Time case where you may want to receive your 
interrupt as soon as possible.

In general, keeping the interrupt disabled for a long time is a pretty 
bad idea because you increase latency. Interrupts should only be 
disabled when it is strictly necessary.

At the moment I don't view this change as necessary. But I am happy to 
be proven otherwise.

>   - For the old vgic implementation, `vgic_sync_from_lrs()` release LRs 
> from processed interrupts also shortens `inflight_irqs` sorted list. So 
> `do_IRQ()` has better chances to write IRQ directly to LR instead of 
> saving it into `lr_pending` list and possibly faster insert the new IRQ 
> into `inflight_irqs` list.
Saving to lr_pending means that you have all the LRs full.

I vaguely recall we spoke about it before but I can't find anything in 
my inbox. So can you explain again your use-case, the number of LRs...?

Note this is were writing down everything in the commit message (or 
after ---) helps people to understand where you are coming from.

Cheers,


-- 
Julien Grall

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  reply	other threads:[~2019-07-30 20:47 UTC|newest]

Thread overview: 59+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
     [not found] <1543440731-21947-1-git-send-email-andrii.anisov@gmail.com>
2018-11-28 21:31 ` [RFC 01/16] xen/arm: Re-enable interrupt later in the trap path Andrii Anisov
2018-11-28 22:00   ` Julien Grall
2019-07-30 17:34     ` [Xen-devel] " Andrii Anisov
2019-07-30 20:46       ` Julien Grall [this message]
2018-11-28 21:31 ` [RFC 02/16] hack: drop GIC v3 support Andrii Anisov
2018-11-29 12:08   ` Andre Przywara
2018-11-28 21:31 ` [RFC 03/16] vgic: move pause_flags check out of vgic spinlock Andrii Anisov
2018-11-28 22:02   ` Julien Grall
2018-11-28 21:31 ` [RFC 04/16] vgic: move irq_to_pending out of lock Andrii Anisov
2018-11-29 11:07   ` Julien Grall
2018-11-28 21:32 ` [RFC 05/16] gic-vgic: Drop an excessive clear_lrs Andrii Anisov
2018-12-11 14:33   ` Julien Grall
2018-12-12 11:01     ` Andrii Anisov
2018-12-12 11:55       ` Julien Grall
2018-11-28 21:32 ` [RFC 06/16] gic: drop interrupts enabling on interrupts processing Andrii Anisov
2018-11-28 22:06   ` Julien Grall
2018-12-12 12:10     ` Julien Grall
2018-11-28 21:32 ` [RFC 07/16] gic-vgic:vgic: do not keep disabled IRQs in any of queues Andrii Anisov
2018-11-28 21:32 ` [RFC 08/16] gic: separate ppi processing Andrii Anisov
2018-12-12 12:37   ` Andrii Anisov
2018-12-12 12:46     ` Julien Grall
2018-12-12 12:52       ` Andrii Anisov
2018-12-12 13:46         ` Julien Grall
2018-11-28 21:32 ` [RFC 09/16] gic-vgic:vgic: avoid excessive conversions Andrii Anisov
2018-11-29 10:23   ` Julien Grall
2018-11-28 21:32 ` [RFC 10/16] gic:vgic:gic-vgic: introduce non-atomic bitops Andrii Anisov
2018-11-29 12:14   ` Andre Przywara
2018-11-29 16:07     ` Julien Grall
2018-12-03 12:33     ` Andrii Anisov
2018-12-03 12:58       ` Julien Grall
2018-12-03 13:05         ` Andrii Anisov
2018-12-03 13:08           ` Julien Grall
2018-12-03 16:37       ` Andre Przywara
2018-11-28 21:32 ` [RFC 11/16] irq: skip action avalability check for guest's IRQ Andrii Anisov
2018-12-11 14:48   ` Julien Grall
2018-12-12 11:30     ` Andrii Anisov
2018-12-12 11:59       ` Julien Grall
2018-12-12 13:51         ` Andrii Anisov
2018-12-12 14:49           ` Julien Grall
2018-12-12 14:58             ` Andrii Anisov
2018-12-12 15:08               ` Julien Grall
2018-12-12 15:57                 ` Andrii Anisov
2018-11-28 21:32 ` [RFC 12/16] gic-v2: Write HCR only on change Andrii Anisov
2018-11-29 16:36   ` Julien Grall
2018-11-28 21:32 ` [RFC 13/16] gic-vgic: skip irqs locking Andrii Anisov
2018-12-12 12:07   ` Julien Grall
2018-12-12 12:35     ` Andrii Anisov
2018-12-12 12:44       ` Julien Grall
2018-12-12 12:47         ` Andrii Anisov
2018-11-28 21:32 ` [RFC 14/16] hack: arm/domain: simplify context restore from idle vcpu Andrii Anisov
2018-11-29 15:53   ` Julien Grall
2018-11-29 16:00   ` Wei Liu
2018-11-28 21:32 ` [RFC 15/16] hack: move gicv2 LRs reads and writes out of spinlocks Andrii Anisov
2018-11-28 21:58   ` Julien Grall
2018-11-28 21:32 ` [RFC 16/16] gic: vgic: align frequently accessed data by cache line size Andrii Anisov
2018-11-29 16:24   ` Julien Grall
2018-11-29  7:40 ` [RFC 00/16] Old GIC (gic-vgic) optimizations for GICV2 Andrii Anisov
2018-11-29 11:00   ` Julien Grall
2018-11-29 12:07   ` Andre Przywara

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