From: Andrii Anisov <andrii_anisov@epam.com>
To: Dario Faggioli <dfaggioli@suse.com>
Cc: xen-devel <xen-devel@lists.xenproject.org>,
Meng Xu <xumengpanda@gmail.com>
Subject: Re: RTDS with extra time issue
Date: Mon, 12 Feb 2018 20:44:37 +0200 [thread overview]
Message-ID: <f4fdc887-3a67-386a-501a-c1f3b28aa980@epam.com> (raw)
In-Reply-To: <20c19a44-f782-d25d-7005-fce286f92f43@epam.com>
Dario,
On 12.02.18 12:20, Andrii Anisov wrote:
> Actually as per Meng's explanation and calculations the problem was on
> my side - wrong DomR task/VCPU parameters.
> I was running the system with dummy loads and values received from
> CARTS and all seems to be ok (no deadline misses occured).
Well, what I expressed as dummy loads was all domains are generic armv8
kernels with minimal fs'es running `dd if=/dev/zero of=/dev/null`,
except DomR. In this case no DL misses occurred with parameters given by
CARTS.
Now I have real driver domain, Android with GPU sharing. Loads are like
youtube playback in DomA, dd from mmc through ssh in DomD. And I see
unexpected DL misses for the same RT configurations.
Well this provides some ground for another my concern about XEN
scheduling approach. My doubt is that scheduling is done within softirq,
so all time spent with pcpu for exception itself and possible timer
actions is accounted for the vcpu which context was interrupted. This
seems to be not really fair and might be disruptive for RT scheduling.
--
*Andrii Anisov*
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next prev parent reply other threads:[~2018-02-12 18:44 UTC|newest]
Thread overview: 25+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-02-09 12:20 RTDS with extra time issue Andrii Anisov
2018-02-09 12:25 ` Andrii Anisov
2018-02-09 13:18 ` Dario Faggioli
2018-02-09 15:03 ` Andrii Anisov
2018-02-09 15:18 ` Dario Faggioli
2018-02-09 15:36 ` Meng Xu
2018-02-09 15:56 ` Andrii Anisov
2018-02-09 17:51 ` Meng Xu
2018-02-10 0:14 ` Dario Faggioli
2018-02-10 4:53 ` Meng Xu
2018-02-12 10:17 ` Dario Faggioli
2018-02-12 11:08 ` Andrii Anisov
2018-02-12 14:52 ` Meng Xu
2018-02-12 10:38 ` Andrii Anisov
2018-02-12 10:20 ` Andrii Anisov
2018-02-12 18:44 ` Andrii Anisov [this message]
2018-02-16 18:37 ` Dario Faggioli
2018-02-20 11:34 ` Andrii Anisov
2018-02-22 17:53 ` Dario Faggioli
2018-02-26 12:00 ` Andrii Anisov
2018-02-09 15:34 ` Meng Xu
2018-02-09 15:53 ` Andrii Anisov
2018-02-09 16:04 ` Andrii Anisov
2018-02-09 17:53 ` Meng Xu
2018-02-09 18:07 ` Andrii Anisov
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