Re: [PATCH] ASoC: nau8822: choose the best master clock prescalar

[Hui Wang <hui.wang@canonical.com>]

On 5/24/22 18:22, David Lin wrote:
> On 2022/5/24 下午 04:38, Hui Wang wrote:
>>
>> On 5/24/22 16:07, David Lin wrote:
>>> On 2022/5/24 上午 11:33, Hui Wang wrote:
>>>> We have an imx6sx EVB with the codec nau8822, when playing the audio
>>>> with 48k sample rate, the audio sounds distorted and obviously faster
>>>>
>> <snip>
>>>> -            div = i;
>>>>           }
>>>>           dev_dbg(component->dev, "master clock prescaler %x for fs 
>>>> %d\n",
>>>>               div, rate);
>>>
>>> Regarding to your environment with input MCLK is 24 MHz, I think you 
>>> should enable PLL for the internal process of codec.
>>>
>>> So you should do the following calls/operations:
>>>
>> Thanks for your suggestion. In our case, we use the simple-card as 
>> the machine driver, the simple-card hard-codes the 2nd parameter of 
>> snd_soc_dai_set_sysclk() to 0, and we don't plan to write a new 
>> machine driver since sound quality is pretty good if setting to 46875Hz.
>>
>> So according to your experience, does the new algorithm bring any 
>> side effect or break existing platforms? If so, we have to write a 
>> new machine driver (that is a big effort).
>>
>> Thanks,
>>
>> Hui.
>>
> Even you can hear better sound quality than original, it don't still 
> have better performance(THD+N) than MCLK is 256FS. Generally,  we will 
> suggest the below that for customer support.
> 1. Check dts description from simple-card about the value of mclk-fs 
> is 256? The reason is nau8822 codec just support 256FS. Besides, the 
> I.MX EVB should be with flexible clock generation.
> 2. Based on the flexible clock generation, you should input 12.288Mhz 
> as MCLK, so the simple-card is suitable for your case with low effort.
> 3. If your MCLK is always 24MHz, PLL enable is preferred as previous 
> mention. One is to implement/porting a machine driver, the other is to 
> revise asoc_simple_hw_params callback function from simple-card-utils.c.

OK, got it. Thanks.


>>> //PLL
>>>     ret = snd_soc_dai_set_sysclk(codec_dai, NAU8822_CLK_PLL,
>>>                       24000000, SND_SOC_CLOCK_IN);
>>>     if (ret < 0 )
>>>         dev_err(card->dev, "failed to set codec sysclk: %d\n", ret);
>>>
>>>     ret = snd_soc_dai_set_pll(codec_dai, 0, 0,
>>>                   24000000, 256 * params_rate(params));
>>>     if (ret < 0 )
>>>
>>>         dev_err(card->dev, "failed to set codec pll: %d\n", ret);
>>>
>>> David
>>>