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Wed, 10 Mar 2021 06:05:14 -0500 (EST) Received: from localhost (disaster-area.hh.sledj.net [local]) by disaster-area.hh.sledj.net (OpenSMTPD) with ESMTPA id 6260bc61; Wed, 10 Mar 2021 11:05:14 +0000 (UTC) To: Philippe =?utf-8?Q?Mathieu-Daud=C3=A9?= , qemu-devel@nongnu.org Subject: Re: [PATCH 9/9] hw/block/pflash_cfi01: Extract pflash_mode_read_array() In-Reply-To: <20210309235028.912078-10-philmd@redhat.com> References: <20210309235028.912078-1-philmd@redhat.com> <20210309235028.912078-10-philmd@redhat.com> X-HGTTG: heart-of-gold From: David Edmondson Date: Wed, 10 Mar 2021 11:05:13 +0000 Message-ID: MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable Received-SPF: softfail client-ip=64.147.123.20; envelope-from=david.edmondson@oracle.com; helo=wout4-smtp.messagingengine.com X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, RCVD_IN_DNSWL_LOW=-0.7, RCVD_IN_MSPIKE_H4=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_PASS=-0.001, SPF_SOFTFAIL=0.665, UNPARSEABLE_RELAY=0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Kevin Wolf , Stephen Checkoway , qemu-block@nongnu.org, Max Reitz , Alistair Francis , Philippe =?utf-8?Q?Mathieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" On Wednesday, 2021-03-10 at 00:50:28 +01, Philippe Mathieu-Daud=C3=A9 wrote: > The same pattern is used when setting the flash in READ_ARRAY mode: > - Set the state machine command to READ_ARRAY > - Reset the write_cycle counter > - Reset the memory region in ROMD > > Refactor the current code by extracting this pattern. > It is used three times: > > - On a read access (on invalid command). > > - On a write access (on command failure, error, or explicitly asked) > > - When the device is initialized. Here the ROMD mode is hidden > by the memory_region_init_rom_device() call. > > Reviewed-by: Alistair Francis > Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: David Edmondson > --- > hw/block/pflash_cfi01.c | 40 +++++++++++++++++----------------------- > 1 file changed, 17 insertions(+), 23 deletions(-) > > diff --git a/hw/block/pflash_cfi01.c b/hw/block/pflash_cfi01.c > index 2618e00926d..32c9b289715 100644 > --- a/hw/block/pflash_cfi01.c > +++ b/hw/block/pflash_cfi01.c > @@ -115,6 +115,19 @@ static const VMStateDescription vmstate_pflash =3D { > } > }; >=20=20 > +static void pflash_mode_read_array(PFlashCFI01 *pfl) > +{ > + trace_pflash_mode_read_array(); > + /* > + * The command 0x00 is not assigned by the CFI open standard, > + * but QEMU historically uses it for the READ_ARRAY command (0xff). > + */ > + trace_pflash_mode_read_array(); > + pfl->cmd =3D 0x00; > + pfl->wcycle =3D 0; > + memory_region_rom_device_set_romd(&pfl->mem, true); > +} > + > /* > * Perform a CFI query based on the bank width of the flash. > * If this code is called we know we have a device_width set for > @@ -283,12 +296,7 @@ static uint32_t pflash_read(PFlashCFI01 *pfl, hwaddr= offset, > default: > /* This should never happen : reset state & treat it as a read */ > DPRINTF("%s: unknown command state: %x\n", __func__, pfl->cmd); > - pfl->wcycle =3D 0; > - /* > - * The command 0x00 is not assigned by the CFI open standard, > - * but QEMU historically uses it for the READ_ARRAY command (0xf= f). > - */ > - pfl->cmd =3D 0x00; > + pflash_mode_read_array(pfl); > /* fall through to read code */ > case 0x00: /* This model reset value for READ_ARRAY (not CFI complia= nt) */ > /* Flash area read */ > @@ -663,10 +671,7 @@ static void pflash_write(PFlashCFI01 *pfl, hwaddr of= fset, > "\n", __func__, offset, pfl->wcycle, pfl->cmd, value); >=20=20 > mode_read_array: > - trace_pflash_mode_read_array(); > - memory_region_rom_device_set_romd(&pfl->mem, true); > - pfl->wcycle =3D 0; > - pfl->cmd =3D 0x00; /* This model reset value for READ_ARRAY (not CFI= ) */ > + pflash_mode_read_array(pfl); > } >=20=20 >=20=20 > @@ -872,13 +877,8 @@ static void pflash_cfi01_realize(DeviceState *dev, E= rror **errp) > pfl->max_device_width =3D pfl->device_width; > } >=20=20 > - pfl->wcycle =3D 0; > - /* > - * The command 0x00 is not assigned by the CFI open standard, > - * but QEMU historically uses it for the READ_ARRAY command (0xff). > - */ > - pfl->cmd =3D 0x00; > pfl->status =3D 0x80; /* WSM ready */ > + pflash_mode_read_array(pfl); > pflash_cfi01_fill_cfi_table(pfl); > } >=20=20 > @@ -887,13 +887,7 @@ static void pflash_cfi01_system_reset(DeviceState *d= ev) > PFlashCFI01 *pfl =3D PFLASH_CFI01(dev); >=20=20 > trace_pflash_reset(); > - /* > - * The command 0x00 is not assigned by the CFI open standard, > - * but QEMU historically uses it for the READ_ARRAY command (0xff). > - */ > - pfl->cmd =3D 0x00; > - pfl->wcycle =3D 0; > - memory_region_rom_device_set_romd(&pfl->mem, true); > + pflash_mode_read_array(pfl); > /* > * The WSM ready timer occurs at most 150ns after system reset. > * This model deliberately ignores this delay. > --=20 > 2.26.2 dme. --=20 Would you offer your throat to the wolf with the red roses?