From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.7 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,MENTIONS_GIT_HOSTING,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id CA4D4C433E0 for ; Sat, 9 Jan 2021 20:52:13 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 7794E23B00 for ; Sat, 9 Jan 2021 20:52:13 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726238AbhAIUv5 (ORCPT ); Sat, 9 Jan 2021 15:51:57 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42198 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726077AbhAIUv4 (ORCPT ); Sat, 9 Jan 2021 15:51:56 -0500 Received: from mail-pf1-x42d.google.com (mail-pf1-x42d.google.com [IPv6:2607:f8b0:4864:20::42d]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 7E9C8C06179F for ; Sat, 9 Jan 2021 12:51:16 -0800 (PST) Received: by mail-pf1-x42d.google.com with SMTP id m6so2953298pfk.1 for ; Sat, 09 Jan 2021 12:51:16 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=dabbelt-com.20150623.gappssmtp.com; s=20150623; h=date:subject:in-reply-to:cc:from:to:message-id:mime-version :content-transfer-encoding; bh=62H/x/rByJ7ggse69TMiJJtItRYsUHxpZdki7cQ0WSY=; b=DoveRgb7gXjFv1+ebT4gOVEgstLeS7xoNCzngzTIpcb6n9yiwNrt81KUF+6Amd0gkK RGOK1gcWgCICsIv/c4SURHsg8OztnlMoRMvJj1dh4E31jGgzNJHrIsngtGwccM9Jsj4C 9b9CVH3nW16+SldrGzvq9Ba75tpJeOrozHIVJPhC3hmxCisbOwttLLbPBvaOZBFFGKkD XktLpcJcbFL6JN2BGMGY4HrfC6+FDi1WDm1zO9/9mJcqnx7TjtgEp766x1eOWP3DZwCH F4ZEalrhwuWiTxNFAId3p3wnknrkMI8Qfo8JUy1Va1ajglff2/EfQinLBe74NKFd7CK9 M6Xw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:date:subject:in-reply-to:cc:from:to:message-id :mime-version:content-transfer-encoding; bh=62H/x/rByJ7ggse69TMiJJtItRYsUHxpZdki7cQ0WSY=; b=cv3CHf5mKR+FdfCjOi4ByuPjheKfP36bkF/qR7OmicxXNfe0dvUOb8uxPvi/MC0qCt CaJ+vC5SXHUpy2Z7xEK7r70YTEXhoJipEEEVC5ahFsfeQZIkK0xTw1rFUMUF+9zkba78 sRcn+NpUfpPf9jG7gz8nb5aZ3H0t3Mb7R05L3LGsFsyuurlsJA4gZuCXkrv7E48Q5FRL zk/r6JmurPOd4KnAUns5Xr+TVZQOu0rWNscNYi+x3Y0uYwDRPBanDA8GCdJk3p1eVU0J 8gSNodZQi8PKDJ2Vi/vRG4TumNx94XOiRvxVVROs5IsmVkgfia2rWg+kWVjCjvwDoZzU XbsQ== X-Gm-Message-State: AOAM533b+o6Gvk2rtHSpevLTlZBpPHvDkz9ZhpZBZPiHjxn4Dxzd+z4U PI8/DLTaiUD0Qbqde9yurLHimedm4UzV2g== X-Google-Smtp-Source: ABdhPJzvQxmL/8rMOc/FYAbYs90guGWjhjVKrS4AG8vAK2ohMHxboO5/LTHzyHEKf2KsQsS1OtwLHQ== X-Received: by 2002:a63:e:: with SMTP id 14mr13053823pga.253.1610225475399; Sat, 09 Jan 2021 12:51:15 -0800 (PST) Received: from localhost (76-210-143-223.lightspeed.sntcca.sbcglobal.net. [76.210.143.223]) by smtp.gmail.com with ESMTPSA id z13sm9312972pjt.45.2021.01.09.12.51.14 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 09 Jan 2021 12:51:14 -0800 (PST) Date: Sat, 09 Jan 2021 12:51:14 -0800 (PST) X-Google-Original-Date: Sat, 09 Jan 2021 12:51:12 PST (-0800) Subject: Re: [PATCH v5 0/5] Unify NUMA implementation between ARM64 & RISC-V In-Reply-To: CC: linux-kernel@vger.kernel.org, rafael@kernel.org, catalin.marinas@arm.com, Jonathan.Cameron@huawei.com, Atish Patra , linux-riscv@lists.infradead.org, will@kernel.org, ardb@kernel.org, linux-arch@vger.kernel.org, liuzhengyuan@tj.kylinos.cn, bhe@redhat.com, anup@brainfault.org, daniel.lezcano@linaro.org, steven.price@arm.com, greentime.hu@sifive.com, aou@eecs.berkeley.edu, Arnd Bergmann , anshuman.khandual@arm.com, Paul Walmsley , linux-arm-kernel@lists.infradead.org, Greg KH , akpm@linux-foundation.org, rppt@kernel.org From: Palmer Dabbelt To: atishp@atishpatra.org Message-ID: Mime-Version: 1.0 (MHng) Content-Type: text/plain; charset=utf-8; format=flowed Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Sun, 13 Dec 2020 17:02:19 PST (-0800), atishp@atishpatra.org wrote: > On Wed, Nov 18, 2020 at 4:39 PM Atish Patra wrote: >> >> This series attempts to move the ARM64 numa implementation to common >> code so that RISC-V can leverage that as well instead of reimplementing >> it again. >> >> RISC-V specific bits are based on initial work done by Greentime Hu [1] but >> modified to reuse the common implementation to avoid duplication. >> >> [1] https://lkml.org/lkml/2020/1/10/233 >> >> This series has been tested on qemu with numa enabled for both RISC-V & ARM64. >> It would be great if somebody can test it on numa capable ARM64 hardware platforms. >> This patch series doesn't modify the maintainers list for the common code (arch_numa) >> as I am not sure if somebody from ARM64 community or Greg should take up the >> maintainership. Ganapatrao was the original author of the arm64 version. >> I would be happy to update that in the next revision once it is decided. >> >> # numactl --hardware >> available: 2 nodes (0-1) >> node 0 cpus: 0 1 2 3 >> node 0 size: 486 MB >> node 0 free: 470 MB >> node 1 cpus: 4 5 6 7 >> node 1 size: 424 MB >> node 1 free: 408 MB >> node distances: >> node 0 1 >> 0: 10 20 >> 1: 20 10 >> # numactl -show >> policy: default >> preferred node: current >> physcpubind: 0 1 2 3 4 5 6 7 >> cpubind: 0 1 >> nodebind: 0 1 >> membind: 0 1 >> >> The patches are also available at >> https://github.com/atishp04/linux/tree/5.11_numa_unified_v5 >> >> For RISC-V, the following qemu series is a pre-requisite(already available in upstream) >> https://patchwork.kernel.org/project/qemu-devel/list/?series=303313 >> >> Testing: >> RISC-V: >> Tested in Qemu and 2 socket OmniXtend FPGA. >> >> ARM64: >> 2 socket kunpeng920 (4 nodes around 250G a node) >> Tested-by: Jonathan Cameron >> >> Changes from v4->v5: >> 1. Added by Acked-by & Reviewed-by tags. >> 2. Swapped patch 1 & 2 in v4 version. >> >> Changes from v3->v4: >> 1. Removed redundant duplicate header. >> 2. Added Reviewed-by tags. >> >> Changes from v2->v3: >> 1. Added Acked-by/Reviewed-by tags. >> 2. Replaced asm/acpi.h with linux/acpi.h >> 3. Defined arch_acpi_numa_init as static. >> >> Changes from v1->v2: >> 1. Replaced ARM64 specific compile time protection with ACPI specific ones. >> 2. Dropped common pcibus_to_node changes. Added required changes in RISC-V. >> 3. Fixed few typos. >> >> Atish Patra (4): >> arm64, numa: Change the numa init functions name to be generic >> numa: Move numa implementation to common code >> riscv: Separate memory init from paging init >> riscv: Add numa support for riscv64 platform >> >> Greentime Hu (1): >> riscv: Add support pte_protnone and pmd_protnone if >> CONFIG_NUMA_BALANCING >> >> arch/arm64/Kconfig | 1 + >> arch/arm64/include/asm/numa.h | 48 +---------------- >> arch/arm64/kernel/acpi_numa.c | 12 ----- >> arch/arm64/mm/Makefile | 1 - >> arch/arm64/mm/init.c | 4 +- >> arch/riscv/Kconfig | 31 ++++++++++- >> arch/riscv/include/asm/mmzone.h | 13 +++++ >> arch/riscv/include/asm/numa.h | 8 +++ >> arch/riscv/include/asm/pci.h | 14 +++++ >> arch/riscv/include/asm/pgtable.h | 21 ++++++++ >> arch/riscv/kernel/setup.c | 11 +++- >> arch/riscv/kernel/smpboot.c | 12 ++++- >> arch/riscv/mm/init.c | 10 +++- >> drivers/base/Kconfig | 6 +++ >> drivers/base/Makefile | 1 + >> .../mm/numa.c => drivers/base/arch_numa.c | 27 ++++++++-- >> include/asm-generic/numa.h | 52 +++++++++++++++++++ >> 17 files changed, 200 insertions(+), 72 deletions(-) >> create mode 100644 arch/riscv/include/asm/mmzone.h >> create mode 100644 arch/riscv/include/asm/numa.h >> rename arch/arm64/mm/numa.c => drivers/base/arch_numa.c (96%) >> create mode 100644 include/asm-generic/numa.h >> >> -- >> 2.25.1 >> >> >> _______________________________________________ >> linux-riscv mailing list >> linux-riscv@lists.infradead.org >> http://lists.infradead.org/mailman/listinfo/linux-riscv > > Hey Palmer, > I did not see this series in for-next. Let me know if you need > anything else to be done for this series. Sorry about that. It's on for-next, with Randy's comment addressed. There was one merge conflict: we don't have resource_init() in for-next yet (which I think means I missed something else). IDK if that's necessary for the NUMA stuff, I just dropped it. I haven't tested this yet. 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[76.210.143.223]) by smtp.gmail.com with ESMTPSA id z13sm9312972pjt.45.2021.01.09.12.51.14 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 09 Jan 2021 12:51:14 -0800 (PST) Date: Sat, 09 Jan 2021 12:51:14 -0800 (PST) X-Google-Original-Date: Sat, 09 Jan 2021 12:51:12 PST (-0800) Subject: Re: [PATCH v5 0/5] Unify NUMA implementation between ARM64 & RISC-V In-Reply-To: From: Palmer Dabbelt To: atishp@atishpatra.org Message-ID: Mime-Version: 1.0 (MHng) X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210109_155118_840763_83EAEF15 X-CRM114-Status: GOOD ( 26.69 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: rafael@kernel.org, catalin.marinas@arm.com, Jonathan.Cameron@huawei.com, Atish Patra , linux-riscv@lists.infradead.org, will@kernel.org, ardb@kernel.org, linux-arch@vger.kernel.org, liuzhengyuan@tj.kylinos.cn, bhe@redhat.com, anup@brainfault.org, daniel.lezcano@linaro.org, steven.price@arm.com, greentime.hu@sifive.com, aou@eecs.berkeley.edu, Arnd Bergmann , anshuman.khandual@arm.com, Paul Walmsley , linux-arm-kernel@lists.infradead.org, Greg KH , linux-kernel@vger.kernel.org, akpm@linux-foundation.org, rppt@kernel.org Content-Transfer-Encoding: 7bit Content-Type: text/plain; charset="us-ascii"; Format="flowed" Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org On Sun, 13 Dec 2020 17:02:19 PST (-0800), atishp@atishpatra.org wrote: > On Wed, Nov 18, 2020 at 4:39 PM Atish Patra wrote: >> >> This series attempts to move the ARM64 numa implementation to common >> code so that RISC-V can leverage that as well instead of reimplementing >> it again. >> >> RISC-V specific bits are based on initial work done by Greentime Hu [1] but >> modified to reuse the common implementation to avoid duplication. >> >> [1] https://lkml.org/lkml/2020/1/10/233 >> >> This series has been tested on qemu with numa enabled for both RISC-V & ARM64. >> It would be great if somebody can test it on numa capable ARM64 hardware platforms. >> This patch series doesn't modify the maintainers list for the common code (arch_numa) >> as I am not sure if somebody from ARM64 community or Greg should take up the >> maintainership. Ganapatrao was the original author of the arm64 version. >> I would be happy to update that in the next revision once it is decided. >> >> # numactl --hardware >> available: 2 nodes (0-1) >> node 0 cpus: 0 1 2 3 >> node 0 size: 486 MB >> node 0 free: 470 MB >> node 1 cpus: 4 5 6 7 >> node 1 size: 424 MB >> node 1 free: 408 MB >> node distances: >> node 0 1 >> 0: 10 20 >> 1: 20 10 >> # numactl -show >> policy: default >> preferred node: current >> physcpubind: 0 1 2 3 4 5 6 7 >> cpubind: 0 1 >> nodebind: 0 1 >> membind: 0 1 >> >> The patches are also available at >> https://github.com/atishp04/linux/tree/5.11_numa_unified_v5 >> >> For RISC-V, the following qemu series is a pre-requisite(already available in upstream) >> https://patchwork.kernel.org/project/qemu-devel/list/?series=303313 >> >> Testing: >> RISC-V: >> Tested in Qemu and 2 socket OmniXtend FPGA. >> >> ARM64: >> 2 socket kunpeng920 (4 nodes around 250G a node) >> Tested-by: Jonathan Cameron >> >> Changes from v4->v5: >> 1. Added by Acked-by & Reviewed-by tags. >> 2. Swapped patch 1 & 2 in v4 version. >> >> Changes from v3->v4: >> 1. Removed redundant duplicate header. >> 2. Added Reviewed-by tags. >> >> Changes from v2->v3: >> 1. Added Acked-by/Reviewed-by tags. >> 2. Replaced asm/acpi.h with linux/acpi.h >> 3. Defined arch_acpi_numa_init as static. >> >> Changes from v1->v2: >> 1. Replaced ARM64 specific compile time protection with ACPI specific ones. >> 2. Dropped common pcibus_to_node changes. Added required changes in RISC-V. >> 3. Fixed few typos. >> >> Atish Patra (4): >> arm64, numa: Change the numa init functions name to be generic >> numa: Move numa implementation to common code >> riscv: Separate memory init from paging init >> riscv: Add numa support for riscv64 platform >> >> Greentime Hu (1): >> riscv: Add support pte_protnone and pmd_protnone if >> CONFIG_NUMA_BALANCING >> >> arch/arm64/Kconfig | 1 + >> arch/arm64/include/asm/numa.h | 48 +---------------- >> arch/arm64/kernel/acpi_numa.c | 12 ----- >> arch/arm64/mm/Makefile | 1 - >> arch/arm64/mm/init.c | 4 +- >> arch/riscv/Kconfig | 31 ++++++++++- >> arch/riscv/include/asm/mmzone.h | 13 +++++ >> arch/riscv/include/asm/numa.h | 8 +++ >> arch/riscv/include/asm/pci.h | 14 +++++ >> arch/riscv/include/asm/pgtable.h | 21 ++++++++ >> arch/riscv/kernel/setup.c | 11 +++- >> arch/riscv/kernel/smpboot.c | 12 ++++- >> arch/riscv/mm/init.c | 10 +++- >> drivers/base/Kconfig | 6 +++ >> drivers/base/Makefile | 1 + >> .../mm/numa.c => drivers/base/arch_numa.c | 27 ++++++++-- >> include/asm-generic/numa.h | 52 +++++++++++++++++++ >> 17 files changed, 200 insertions(+), 72 deletions(-) >> create mode 100644 arch/riscv/include/asm/mmzone.h >> create mode 100644 arch/riscv/include/asm/numa.h >> rename arch/arm64/mm/numa.c => drivers/base/arch_numa.c (96%) >> create mode 100644 include/asm-generic/numa.h >> >> -- >> 2.25.1 >> >> >> _______________________________________________ >> linux-riscv mailing list >> linux-riscv@lists.infradead.org >> http://lists.infradead.org/mailman/listinfo/linux-riscv > > Hey Palmer, > I did not see this series in for-next. Let me know if you need > anything else to be done for this series. Sorry about that. It's on for-next, with Randy's comment addressed. There was one merge conflict: we don't have resource_init() in for-next yet (which I think means I missed something else). IDK if that's necessary for the NUMA stuff, I just dropped it. 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[76.210.143.223]) by smtp.gmail.com with ESMTPSA id z13sm9312972pjt.45.2021.01.09.12.51.14 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 09 Jan 2021 12:51:14 -0800 (PST) Date: Sat, 09 Jan 2021 12:51:14 -0800 (PST) X-Google-Original-Date: Sat, 09 Jan 2021 12:51:12 PST (-0800) Subject: Re: [PATCH v5 0/5] Unify NUMA implementation between ARM64 & RISC-V In-Reply-To: From: Palmer Dabbelt To: atishp@atishpatra.org Message-ID: Mime-Version: 1.0 (MHng) X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210109_155118_839132_83947744 X-CRM114-Status: GOOD ( 28.06 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: rafael@kernel.org, catalin.marinas@arm.com, Jonathan.Cameron@huawei.com, Atish Patra , linux-riscv@lists.infradead.org, will@kernel.org, ardb@kernel.org, linux-arch@vger.kernel.org, liuzhengyuan@tj.kylinos.cn, bhe@redhat.com, anup@brainfault.org, daniel.lezcano@linaro.org, steven.price@arm.com, greentime.hu@sifive.com, aou@eecs.berkeley.edu, Arnd Bergmann , anshuman.khandual@arm.com, Paul Walmsley , linux-arm-kernel@lists.infradead.org, Greg KH , linux-kernel@vger.kernel.org, akpm@linux-foundation.org, rppt@kernel.org Content-Transfer-Encoding: 7bit Content-Type: text/plain; charset="us-ascii"; Format="flowed" Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Sun, 13 Dec 2020 17:02:19 PST (-0800), atishp@atishpatra.org wrote: > On Wed, Nov 18, 2020 at 4:39 PM Atish Patra wrote: >> >> This series attempts to move the ARM64 numa implementation to common >> code so that RISC-V can leverage that as well instead of reimplementing >> it again. >> >> RISC-V specific bits are based on initial work done by Greentime Hu [1] but >> modified to reuse the common implementation to avoid duplication. >> >> [1] https://lkml.org/lkml/2020/1/10/233 >> >> This series has been tested on qemu with numa enabled for both RISC-V & ARM64. >> It would be great if somebody can test it on numa capable ARM64 hardware platforms. >> This patch series doesn't modify the maintainers list for the common code (arch_numa) >> as I am not sure if somebody from ARM64 community or Greg should take up the >> maintainership. Ganapatrao was the original author of the arm64 version. >> I would be happy to update that in the next revision once it is decided. >> >> # numactl --hardware >> available: 2 nodes (0-1) >> node 0 cpus: 0 1 2 3 >> node 0 size: 486 MB >> node 0 free: 470 MB >> node 1 cpus: 4 5 6 7 >> node 1 size: 424 MB >> node 1 free: 408 MB >> node distances: >> node 0 1 >> 0: 10 20 >> 1: 20 10 >> # numactl -show >> policy: default >> preferred node: current >> physcpubind: 0 1 2 3 4 5 6 7 >> cpubind: 0 1 >> nodebind: 0 1 >> membind: 0 1 >> >> The patches are also available at >> https://github.com/atishp04/linux/tree/5.11_numa_unified_v5 >> >> For RISC-V, the following qemu series is a pre-requisite(already available in upstream) >> https://patchwork.kernel.org/project/qemu-devel/list/?series=303313 >> >> Testing: >> RISC-V: >> Tested in Qemu and 2 socket OmniXtend FPGA. >> >> ARM64: >> 2 socket kunpeng920 (4 nodes around 250G a node) >> Tested-by: Jonathan Cameron >> >> Changes from v4->v5: >> 1. Added by Acked-by & Reviewed-by tags. >> 2. Swapped patch 1 & 2 in v4 version. >> >> Changes from v3->v4: >> 1. Removed redundant duplicate header. >> 2. Added Reviewed-by tags. >> >> Changes from v2->v3: >> 1. Added Acked-by/Reviewed-by tags. >> 2. Replaced asm/acpi.h with linux/acpi.h >> 3. Defined arch_acpi_numa_init as static. >> >> Changes from v1->v2: >> 1. Replaced ARM64 specific compile time protection with ACPI specific ones. >> 2. Dropped common pcibus_to_node changes. Added required changes in RISC-V. >> 3. Fixed few typos. >> >> Atish Patra (4): >> arm64, numa: Change the numa init functions name to be generic >> numa: Move numa implementation to common code >> riscv: Separate memory init from paging init >> riscv: Add numa support for riscv64 platform >> >> Greentime Hu (1): >> riscv: Add support pte_protnone and pmd_protnone if >> CONFIG_NUMA_BALANCING >> >> arch/arm64/Kconfig | 1 + >> arch/arm64/include/asm/numa.h | 48 +---------------- >> arch/arm64/kernel/acpi_numa.c | 12 ----- >> arch/arm64/mm/Makefile | 1 - >> arch/arm64/mm/init.c | 4 +- >> arch/riscv/Kconfig | 31 ++++++++++- >> arch/riscv/include/asm/mmzone.h | 13 +++++ >> arch/riscv/include/asm/numa.h | 8 +++ >> arch/riscv/include/asm/pci.h | 14 +++++ >> arch/riscv/include/asm/pgtable.h | 21 ++++++++ >> arch/riscv/kernel/setup.c | 11 +++- >> arch/riscv/kernel/smpboot.c | 12 ++++- >> arch/riscv/mm/init.c | 10 +++- >> drivers/base/Kconfig | 6 +++ >> drivers/base/Makefile | 1 + >> .../mm/numa.c => drivers/base/arch_numa.c | 27 ++++++++-- >> include/asm-generic/numa.h | 52 +++++++++++++++++++ >> 17 files changed, 200 insertions(+), 72 deletions(-) >> create mode 100644 arch/riscv/include/asm/mmzone.h >> create mode 100644 arch/riscv/include/asm/numa.h >> rename arch/arm64/mm/numa.c => drivers/base/arch_numa.c (96%) >> create mode 100644 include/asm-generic/numa.h >> >> -- >> 2.25.1 >> >> >> _______________________________________________ >> linux-riscv mailing list >> linux-riscv@lists.infradead.org >> http://lists.infradead.org/mailman/listinfo/linux-riscv > > Hey Palmer, > I did not see this series in for-next. Let me know if you need > anything else to be done for this series. Sorry about that. It's on for-next, with Randy's comment addressed. There was one merge conflict: we don't have resource_init() in for-next yet (which I think means I missed something else). IDK if that's necessary for the NUMA stuff, I just dropped it. I haven't tested this yet. _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel