From: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
To: Ravulapati Vishnu vardhan rao <Vishnuvardhanrao.Ravulapati@amd.com>
Cc: "moderated list:SOUND - SOC LAYER / DYNAMIC AUDIO POWER
MANAGEM..." <alsa-devel@alsa-project.org>,
Maruthi Bayyavarapu <maruthi.bayyavarapu@amd.com>,
Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>,
Liam Girdwood <lgirdwood@gmail.com>,
YueHaibing <yuehaibing@huawei.com>,
open list <linux-kernel@vger.kernel.org>,
Takashi Iwai <tiwai@suse.com>, Mark Brown <broonie@kernel.org>,
djkurtz@google.com, Vijendar Mukunda <Vijendar.Mukunda@amd.com>,
Alexander.Deucher@amd.com,
Colin Ian King <colin.king@canonical.com>,
Akshu.Agrawal@amd.com
Subject: Re: [alsa-devel] [RESEND PATCH v3 5/6] ASoC: amd: handle ACP3x i2s-sp watermark interrupt.
Date: Thu, 7 Nov 2019 09:27:15 -0600 [thread overview]
Message-ID: <18b68b8f-773d-8493-22ab-0be3e749b04b@linux.intel.com> (raw)
In-Reply-To: <1573133093-28208-6-git-send-email-Vishnuvardhanrao.Ravulapati@amd.com>
On 11/7/19 7:24 AM, Ravulapati Vishnu vardhan rao wrote:
> whenever audio data equal to I2S-SP fifo watermark level is
> produced/consumed, interrupt is generated.
>
> Signed-off-by: Ravulapati Vishnu vardhan rao <Vishnuvardhanrao.Ravulapati@amd.com>
> ---
> sound/soc/amd/raven/acp3x-pcm-dma.c | 14 ++++++++++++++
> 1 file changed, 14 insertions(+)
>
> diff --git a/sound/soc/amd/raven/acp3x-pcm-dma.c b/sound/soc/amd/raven/acp3x-pcm-dma.c
> index 8fab505..629a32f 100644
> --- a/sound/soc/amd/raven/acp3x-pcm-dma.c
> +++ b/sound/soc/amd/raven/acp3x-pcm-dma.c
> @@ -176,6 +176,13 @@ static irqreturn_t i2s_irq_handler(int irq, void *dev_id)
> snd_pcm_period_elapsed(rv_i2s_data->play_stream);
> play_flag = 1;
> }
> + if ((val & BIT(I2S_TX_THRESHOLD)) &&
> + rv_i2s_data->i2ssp_play_stream) {
> + rv_writel(BIT(I2S_TX_THRESHOLD),
> + rv_i2s_data->acp3x_base + mmACP_EXTERNAL_INTR_STAT);
> + snd_pcm_period_elapsed(rv_i2s_data->i2ssp_play_stream);
The commit message looks odd. If you have a DMA and signal a period
elapsed, is this really a case where the FIFO level reaches a watermark?
Usually the FIFOs are somewhat small and there are multiple DMA
transfers per period?
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next prev parent reply other threads:[~2019-11-07 17:08 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <1573133093-28208-1-git-send-email-Vishnuvardhanrao.Ravulapati@amd.com>
2019-11-07 13:24 ` [alsa-devel] [PATCH v3 1/6] ASoC: amd:Create multiple I2S platform device endpoints Ravulapati Vishnu vardhan rao
2019-11-07 13:24 ` [alsa-devel] [PATCH v3 2/6] ASoC: amd: Refactoring of DAI from DMA driver Ravulapati Vishnu vardhan rao
2019-11-07 15:13 ` Pierre-Louis Bossart
2019-11-07 13:24 ` [alsa-devel] [PATCH v3 3/6] ASoC: amd: Enabling I2S instance in DMA and DAI Ravulapati Vishnu vardhan rao
2019-11-07 15:22 ` Pierre-Louis Bossart
2019-11-07 13:24 ` [alsa-devel] [RESEND PATCH v3 4/6] ASoC: amd: add ACP3x TDM mode support Ravulapati Vishnu vardhan rao
2019-11-07 13:24 ` [alsa-devel] [RESEND PATCH v3 5/6] ASoC: amd: handle ACP3x i2s-sp watermark interrupt Ravulapati Vishnu vardhan rao
2019-11-07 15:27 ` Pierre-Louis Bossart [this message]
2019-11-07 13:24 ` [alsa-devel] [PATCH v3 6/6] ASoC: amd: Added ACP3x system resume and runtime pm Ravulapati Vishnu vardhan rao
2019-11-07 15:34 ` Pierre-Louis Bossart
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