From: Evan Quan <evan.quan@amd.com>
To: amd-gfx@lists.freedesktop.org
Cc: alexander.deucher@amd.com, Felix.Kuehling@amd.com,
Evan Quan <evan.quan@amd.com>,
Harish.Kasiviswanathan@amd.com, nirmodas@amd.com
Subject: [PATCH 13/17] drm/amd/powerplay: add control method to bypass metrics cache on Navi10
Date: Fri, 31 Jul 2020 10:43:12 +0800 [thread overview]
Message-ID: <20200731024316.28324-13-evan.quan@amd.com> (raw)
In-Reply-To: <20200731024316.28324-1-evan.quan@amd.com>
As for the gpu metric export, metrics cache makes no sense. It's up to
user to decide how often the metrics should be retrieved.
Change-Id: I281b4de9262b98f0c52131feb39ba9e101b548b7
Signed-off-by: Evan Quan <evan.quan@amd.com>
---
drivers/gpu/drm/amd/powerplay/navi10_ppt.c | 60 ++++++++++++++--------
1 file changed, 38 insertions(+), 22 deletions(-)
diff --git a/drivers/gpu/drm/amd/powerplay/navi10_ppt.c b/drivers/gpu/drm/amd/powerplay/navi10_ppt.c
index a4ab1ace38fe..ee8d938ea3bd 100644
--- a/drivers/gpu/drm/amd/powerplay/navi10_ppt.c
+++ b/drivers/gpu/drm/amd/powerplay/navi10_ppt.c
@@ -504,22 +504,16 @@ static int navi10_tables_init(struct smu_context *smu)
return -ENOMEM;
}
-static int navi10_get_smu_metrics_data(struct smu_context *smu,
- MetricsMember_t member,
- uint32_t *value)
+static int navi10_get_metrics_table_locked(struct smu_context *smu,
+ SmuMetrics_t *metrics_table,
+ bool bypass_cache)
{
struct smu_table_context *smu_table= &smu->smu_table;
- /*
- * This works for NV12 also. As although NV12 uses a different
- * SmuMetrics structure from other NV1X ASICs, they share the
- * same offsets for the heading parts(those members used here).
- */
- SmuMetrics_t *metrics = (SmuMetrics_t *)smu_table->metrics_table;
int ret = 0;
- mutex_lock(&smu->metrics_lock);
- if (!smu_table->metrics_time ||
- time_after(jiffies, smu_table->metrics_time + msecs_to_jiffies(1))) {
+ if (bypass_cache ||
+ !smu_table->metrics_time ||
+ time_after(jiffies, smu_table->metrics_time + msecs_to_jiffies(1))) {
ret = smu_cmn_update_table(smu,
SMU_TABLE_SMU_METRICS,
0,
@@ -527,12 +521,40 @@ static int navi10_get_smu_metrics_data(struct smu_context *smu,
false);
if (ret) {
dev_info(smu->adev->dev, "Failed to export SMU metrics table!\n");
- mutex_unlock(&smu->metrics_lock);
return ret;
}
smu_table->metrics_time = jiffies;
}
+ if (metrics_table)
+ memcpy(metrics_table, smu_table->metrics_table, sizeof(SmuMetrics_t));
+
+ return 0;
+}
+
+static int navi10_get_smu_metrics_data(struct smu_context *smu,
+ MetricsMember_t member,
+ uint32_t *value)
+{
+ struct smu_table_context *smu_table= &smu->smu_table;
+ /*
+ * This works for NV12 also. As although NV12 uses a different
+ * SmuMetrics structure from other NV1X ASICs, they share the
+ * same offsets for the heading parts(those members used here).
+ */
+ SmuMetrics_t *metrics = (SmuMetrics_t *)smu_table->metrics_table;
+ int ret = 0;
+
+ mutex_lock(&smu->metrics_lock);
+
+ ret = navi10_get_metrics_table_locked(smu,
+ NULL,
+ false);
+ if (ret) {
+ mutex_unlock(&smu->metrics_lock);
+ return ret;
+ }
+
switch (member) {
case METRICS_CURR_GFXCLK:
*value = metrics->CurrClock[PPCLK_GFXCLK];
@@ -2526,19 +2548,13 @@ static ssize_t navi10_get_gpu_metrics(struct smu_context *smu,
mutex_lock(&smu->metrics_lock);
- ret = smu_cmn_update_table(smu,
- SMU_TABLE_SMU_METRICS,
- 0,
- smu_table->metrics_table,
- false);
+ ret = navi10_get_metrics_table_locked(smu,
+ &metrics,
+ true);
if (ret) {
- dev_info(smu->adev->dev, "Failed to export SMU metrics table!\n");
mutex_unlock(&smu->metrics_lock);
return ret;
}
- smu_table->metrics_time = jiffies;
-
- memcpy(&metrics, smu_table->metrics_table, sizeof(SmuMetrics_t));
if (adev->asic_type == CHIP_NAVI12)
memcpy(&nv12_metrics, smu_table->metrics_table, sizeof(SmuMetrics_NV12_t));
--
2.28.0
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next prev parent reply other threads:[~2020-07-31 2:44 UTC|newest]
Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-07-31 2:43 [PATCH 01/17] drm/amd/powerplay: define an universal data structure for gpu metrics (V4) Evan Quan
2020-07-31 2:43 ` [PATCH 02/17] drm/amd/powerplay: add new sysfs interface for retrieving gpu metrics(V2) Evan Quan
2020-07-31 2:43 ` [PATCH 03/17] drm/amd/powerplay: implement SMU V11 common APIs for retrieving link speed/width Evan Quan
2020-07-31 2:43 ` [PATCH 04/17] drm/amd/powerplay: add Arcturus support for gpu metrics export Evan Quan
2020-07-31 2:43 ` [PATCH 05/17] drm/amd/powerplay: update the data structure for NV12 SmuMetrics Evan Quan
2020-07-31 2:43 ` [PATCH 06/17] drm/amd/powerplay: add Navi1x support for gpu metrics export Evan Quan
2020-07-31 2:43 ` [PATCH 07/17] drm/amd/powerplay: add Sienna Cichlid " Evan Quan
2020-07-31 2:43 ` [PATCH 08/17] drm/amd/powerplay: add Renoir support for gpu metrics export(V2) Evan Quan
2020-07-31 14:41 ` Nirmoy
2020-07-31 2:43 ` [PATCH 09/17] drm/amd/powerplay: enable gpu_metrics export on legacy powerplay routines Evan Quan
2020-07-31 2:43 ` [PATCH 10/17] drm/amd/powerplay: add Vega20 support for gpu metrics export Evan Quan
2020-07-31 2:43 ` [PATCH 11/17] drm/amd/powerplay: add Vega12 " Evan Quan
2020-08-04 20:40 ` Alex Deucher
2020-07-31 2:43 ` [PATCH 12/17] drm/amd/powerplay: add control method to bypass metrics cache on Arcturus Evan Quan
2020-07-31 2:43 ` Evan Quan [this message]
2020-07-31 2:43 ` [PATCH 14/17] drm/amd/powerplay: add control method to bypass metrics cache on Sienna Cichlid Evan Quan
2020-07-31 2:43 ` [PATCH 15/17] drm/amd/powerplay: add control method to bypass metrics cache on Renoir Evan Quan
2020-07-31 2:43 ` [PATCH 16/17] drm/amd/powerplay: add control method to bypass metrics cache on Vega20 Evan Quan
2020-07-31 2:43 ` [PATCH 17/17] drm/amd/powerplay: add control method to bypass metrics cache on Vega12 Evan Quan
2020-08-04 20:41 ` Alex Deucher
2020-08-05 3:14 ` Quan, Evan
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