From: "Quan, Evan" <Evan.Quan@amd.com>
To: Alex Deucher <alexdeucher@gmail.com>,
"amd-gfx@lists.freedesktop.org" <amd-gfx@lists.freedesktop.org>
Cc: "Deucher, Alexander" <Alexander.Deucher@amd.com>
Subject: RE: [PATCH 1/2] drm/amdgpu: update smu_v11_0_pptable.h
Date: Fri, 7 Feb 2020 07:36:49 +0000 [thread overview]
Message-ID: <MN2PR12MB3344E3BA0850A91ED80C55A0E41C0@MN2PR12MB3344.namprd12.prod.outlook.com> (raw)
In-Reply-To: <20200206195516.302101-1-alexander.deucher@amd.com>
> SMU_11_0_ODFEATURE_COUNT = 14,
This seems a little weird.
Maybe it should be "SMU_11_0_ODFEATURE_COUNT = 1 << SMU_11_0_ODCAP_COUNT, "
With above confirmed, the patch series is reviewed-by: Evan Quan <evan.quan@amd.com>
>-----Original Message-----
>From: amd-gfx <amd-gfx-bounces@lists.freedesktop.org> On Behalf Of Alex
>Deucher
>Sent: Friday, February 7, 2020 3:55 AM
>To: amd-gfx@lists.freedesktop.org
>Cc: Deucher, Alexander <Alexander.Deucher@amd.com>
>Subject: [PATCH 1/2] drm/amdgpu: update smu_v11_0_pptable.h
>
>Update to the latest changes.
>
>Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
>---
> .../drm/amd/powerplay/inc/smu_v11_0_pptable.h | 46 +++++++++++++-----
>-
> 1 file changed, 32 insertions(+), 14 deletions(-)
>
>diff --git a/drivers/gpu/drm/amd/powerplay/inc/smu_v11_0_pptable.h
>b/drivers/gpu/drm/amd/powerplay/inc/smu_v11_0_pptable.h
>index b2f96a101124..7a63cf8e85ed 100644
>--- a/drivers/gpu/drm/amd/powerplay/inc/smu_v11_0_pptable.h
>+++ b/drivers/gpu/drm/amd/powerplay/inc/smu_v11_0_pptable.h
>@@ -39,21 +39,39 @@
> #define SMU_11_0_PP_OVERDRIVE_VERSION 0x0800
> #define SMU_11_0_PP_POWERSAVINGCLOCK_VERSION 0x0100
>
>+enum SMU_11_0_ODFEATURE_CAP {
>+ SMU_11_0_ODCAP_GFXCLK_LIMITS = 0,
>+ SMU_11_0_ODCAP_GFXCLK_CURVE,
>+ SMU_11_0_ODCAP_UCLK_MAX,
>+ SMU_11_0_ODCAP_POWER_LIMIT,
>+ SMU_11_0_ODCAP_FAN_ACOUSTIC_LIMIT,
>+ SMU_11_0_ODCAP_FAN_SPEED_MIN,
>+ SMU_11_0_ODCAP_TEMPERATURE_FAN,
>+ SMU_11_0_ODCAP_TEMPERATURE_SYSTEM,
>+ SMU_11_0_ODCAP_MEMORY_TIMING_TUNE,
>+ SMU_11_0_ODCAP_FAN_ZERO_RPM_CONTROL,
>+ SMU_11_0_ODCAP_AUTO_UV_ENGINE,
>+ SMU_11_0_ODCAP_AUTO_OC_ENGINE,
>+ SMU_11_0_ODCAP_AUTO_OC_MEMORY,
>+ SMU_11_0_ODCAP_FAN_CURVE,
>+ SMU_11_0_ODCAP_COUNT,
>+};
>+
> enum SMU_11_0_ODFEATURE_ID {
>- SMU_11_0_ODFEATURE_GFXCLK_LIMITS = 1 << 0, //GFXCLK Limit
>feature
>- SMU_11_0_ODFEATURE_GFXCLK_CURVE = 1 << 1, //GFXCLK Curve
>feature
>- SMU_11_0_ODFEATURE_UCLK_MAX = 1 << 2, //UCLK Limit
>feature
>- SMU_11_0_ODFEATURE_POWER_LIMIT = 1 << 3, //Power Limit
>feature
>- SMU_11_0_ODFEATURE_FAN_ACOUSTIC_LIMIT = 1 << 4, //Fan
>Acoustic RPM feature
>- SMU_11_0_ODFEATURE_FAN_SPEED_MIN = 1 << 5, //Minimum
>Fan Speed feature
>- SMU_11_0_ODFEATURE_TEMPERATURE_FAN = 1 << 6, //Fan Target
>Temperature Limit feature
>- SMU_11_0_ODFEATURE_TEMPERATURE_SYSTEM = 1 << 7,
>//Operating Temperature Limit feature
>- SMU_11_0_ODFEATURE_MEMORY_TIMING_TUNE = 1 << 8, //AC
>Timing Tuning feature
>- SMU_11_0_ODFEATURE_FAN_ZERO_RPM_CONTROL = 1 << 9, //Zero
>RPM feature
>- SMU_11_0_ODFEATURE_AUTO_UV_ENGINE = 1 << 10, //Auto
>Under Volt GFXCLK feature
>- SMU_11_0_ODFEATURE_AUTO_OC_ENGINE = 1 << 11, //Auto Over
>Clock GFXCLK feature
>- SMU_11_0_ODFEATURE_AUTO_OC_MEMORY = 1 << 12, //Auto
>Over Clock MCLK feature
>- SMU_11_0_ODFEATURE_FAN_CURVE = 1 << 13, //VICTOR TODO
>+ SMU_11_0_ODFEATURE_GFXCLK_LIMITS = 1 <<
>SMU_11_0_ODCAP_GFXCLK_LIMITS, //GFXCLK Limit feature
>+ SMU_11_0_ODFEATURE_GFXCLK_CURVE = 1 <<
>SMU_11_0_ODCAP_GFXCLK_CURVE, //GFXCLK Curve feature
>+ SMU_11_0_ODFEATURE_UCLK_MAX = 1 <<
>SMU_11_0_ODCAP_UCLK_MAX, //UCLK Limit feature
>+ SMU_11_0_ODFEATURE_POWER_LIMIT = 1 <<
>SMU_11_0_ODCAP_POWER_LIMIT, //Power Limit feature
>+ SMU_11_0_ODFEATURE_FAN_ACOUSTIC_LIMIT = 1 <<
>SMU_11_0_ODCAP_FAN_ACOUSTIC_LIMIT, //Fan Acoustic RPM feature
>+ SMU_11_0_ODFEATURE_FAN_SPEED_MIN = 1 <<
>SMU_11_0_ODCAP_FAN_SPEED_MIN, //Minimum Fan Speed feature
>+ SMU_11_0_ODFEATURE_TEMPERATURE_FAN = 1 <<
>SMU_11_0_ODCAP_TEMPERATURE_FAN, //Fan Target Temperature
>Limit feature
>+ SMU_11_0_ODFEATURE_TEMPERATURE_SYSTEM = 1 <<
>SMU_11_0_ODCAP_TEMPERATURE_SYSTEM, //Operating Temperature
>Limit feature
>+ SMU_11_0_ODFEATURE_MEMORY_TIMING_TUNE = 1 <<
>SMU_11_0_ODCAP_MEMORY_TIMING_TUNE, //AC Timing Tuning feature
>+ SMU_11_0_ODFEATURE_FAN_ZERO_RPM_CONTROL = 1 <<
>SMU_11_0_ODCAP_FAN_ZERO_RPM_CONTROL, //Zero RPM feature
>+ SMU_11_0_ODFEATURE_AUTO_UV_ENGINE = 1 <<
>SMU_11_0_ODCAP_AUTO_UV_ENGINE, //Auto Under Volt GFXCLK
>feature
>+ SMU_11_0_ODFEATURE_AUTO_OC_ENGINE = 1 <<
>SMU_11_0_ODCAP_AUTO_OC_ENGINE, //Auto Over Clock GFXCLK
>feature
>+ SMU_11_0_ODFEATURE_AUTO_OC_MEMORY = 1 <<
>SMU_11_0_ODCAP_AUTO_OC_MEMORY, //Auto Over Clock MCLK
>feature
>+ SMU_11_0_ODFEATURE_FAN_CURVE = 1 <<
>SMU_11_0_ODCAP_FAN_CURVE, //Fan Curve feature
> SMU_11_0_ODFEATURE_COUNT = 14,
> };
> #define SMU_11_0_MAX_ODFEATURE 32 //Maximum Number of OD
>Features
>--
>2.24.1
>
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next prev parent reply other threads:[~2020-02-07 7:36 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-02-06 19:55 [PATCH 1/2] drm/amdgpu: update smu_v11_0_pptable.h Alex Deucher
2020-02-06 19:55 ` [PATCH 2/2] drm/amdgpu:/navi10: use the ODCAP enum to index the caps array Alex Deucher
2020-02-09 22:03 ` Matt Coffin
2020-02-07 7:36 ` Quan, Evan [this message]
2020-02-07 15:47 ` [PATCH 1/2] drm/amdgpu: update smu_v11_0_pptable.h Alex Deucher
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