From: Peter Zijlstra <peterz@infradead.org>
To: x86@kernel.org, jpoimboe@redhat.com, andrew.cooper3@citrix.com
Cc: linux-kernel@vger.kernel.org, peterz@infradead.org,
alexei.starovoitov@gmail.com, ndesaulniers@google.com,
bpf@vger.kernel.org
Subject: [PATCH v3 06/16] x86/asm: Fix register order
Date: Tue, 26 Oct 2021 14:01:38 +0200 [thread overview]
Message-ID: <20211026120309.978573921@infradead.org> (raw)
In-Reply-To: 20211026120132.613201817@infradead.org
Ensure the register order is correct; this allows for easy translation
between register number and trampoline and vice-versa.
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
---
arch/x86/include/asm/GEN-for-each-reg.h | 13 +++++++++----
1 file changed, 9 insertions(+), 4 deletions(-)
--- a/arch/x86/include/asm/GEN-for-each-reg.h
+++ b/arch/x86/include/asm/GEN-for-each-reg.h
@@ -1,11 +1,16 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * These are in machine order; things rely on that.
+ */
#ifdef CONFIG_64BIT
GEN(rax)
-GEN(rbx)
GEN(rcx)
GEN(rdx)
+GEN(rbx)
+GEN(rsp)
+GEN(rbp)
GEN(rsi)
GEN(rdi)
-GEN(rbp)
GEN(r8)
GEN(r9)
GEN(r10)
@@ -16,10 +20,11 @@ GEN(r14)
GEN(r15)
#else
GEN(eax)
-GEN(ebx)
GEN(ecx)
GEN(edx)
+GEN(ebx)
+GEN(esp)
+GEN(ebp)
GEN(esi)
GEN(edi)
-GEN(ebp)
#endif
next prev parent reply other threads:[~2021-10-26 12:08 UTC|newest]
Thread overview: 32+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-10-26 12:01 [PATCH v3 00/16] x86: Rewrite the retpoline rewrite logic Peter Zijlstra
2021-10-26 12:01 ` [PATCH v3 01/16] objtool: Classify symbols Peter Zijlstra
2021-10-28 3:58 ` Josh Poimboeuf
2021-10-26 12:01 ` [PATCH v3 02/16] objtool: Explicitly avoid self modifying code in .altinstr_replacement Peter Zijlstra
2021-10-28 4:01 ` Josh Poimboeuf
2021-10-26 12:01 ` [PATCH v3 03/16] objtool: Shrink struct instruction Peter Zijlstra
2021-10-26 12:01 ` [PATCH v3 04/16] objtool,x86: Replace alternatives with .retpoline_sites Peter Zijlstra
2021-10-26 12:01 ` [PATCH v3 05/16] x86/retpoline: Remove unused replacement symbols Peter Zijlstra
2021-10-26 12:01 ` Peter Zijlstra [this message]
2021-10-26 12:01 ` [PATCH v3 07/16] x86/asm: Fixup odd GEN-for-each-reg.h usage Peter Zijlstra
2021-10-26 12:01 ` [PATCH v3 08/16] x86/retpoline: Move the retpoline thunk declarations to nospec-branch.h Peter Zijlstra
2021-10-26 12:01 ` [PATCH v3 09/16] x86/retpoline: Create a retpoline thunk array Peter Zijlstra
2021-10-26 12:01 ` [PATCH v3 10/16] x86/alternative: Implement .retpoline_sites support Peter Zijlstra
2021-10-27 17:38 ` Borislav Petkov
2021-10-27 19:10 ` Peter Zijlstra
2021-10-26 12:01 ` [PATCH v3 11/16] x86/alternative: Handle Jcc __x86_indirect_thunk_\reg Peter Zijlstra
2021-10-28 9:29 ` Borislav Petkov
2021-10-26 12:01 ` [PATCH v3 12/16] x86/alternative: Try inline spectre_v2=retpoline,amd Peter Zijlstra
2021-10-26 12:01 ` [PATCH v3 13/16] x86/alternative: Add debug prints to apply_retpolines() Peter Zijlstra
2021-10-26 12:01 ` [PATCH v3 14/16] x86,bugs: Unconditionally allow spectre_v2=retpoline,amd Peter Zijlstra
2021-10-26 12:01 ` [PATCH v3 15/16] bpf, x86: Simplify computing label offsets Peter Zijlstra
2021-10-26 12:01 ` [PATCH v3 16/16] bpf,x86: Respect X86_FEATURE_RETPOLINE* Peter Zijlstra
2021-10-26 18:26 ` [PATCH v3 00/16] x86: Rewrite the retpoline rewrite logic Alexei Starovoitov
2021-10-26 18:45 ` Peter Zijlstra
2021-10-26 20:00 ` Alexei Starovoitov
2021-10-26 21:05 ` Peter Zijlstra
2021-10-26 21:05 ` Alexei Starovoitov
2021-10-27 9:00 ` Peter Zijlstra
2021-10-27 17:32 ` Alexei Starovoitov
2021-10-28 5:17 ` Josh Poimboeuf
2021-10-28 17:43 ` Borislav Petkov
2021-10-29 12:43 ` Miroslav Benes
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