From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.0 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS, UNWANTED_LANGUAGE_BODY,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id E12ADC282DD for ; Mon, 10 Jun 2019 08:17:18 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id C30F020859 for ; Mon, 10 Jun 2019 08:17:18 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2388443AbfFJIQg (ORCPT ); Mon, 10 Jun 2019 04:16:36 -0400 Received: from inva021.nxp.com ([92.121.34.21]:37466 "EHLO inva021.nxp.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2387824AbfFJIQf (ORCPT ); Mon, 10 Jun 2019 04:16:35 -0400 Received: from inva021.nxp.com (localhost [127.0.0.1]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id 59C0A200737; Mon, 10 Jun 2019 10:16:32 +0200 (CEST) Received: from invc005.ap-rdc01.nxp.com (invc005.ap-rdc01.nxp.com [165.114.16.14]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id 2650C2001C0; Mon, 10 Jun 2019 10:16:24 +0200 (CEST) Received: from localhost.localdomain (mega.ap.freescale.net [10.192.208.232]) by invc005.ap-rdc01.nxp.com (Postfix) with ESMTP id 2400C40319; Mon, 10 Jun 2019 16:16:14 +0800 (SGT) From: yibin.gong@nxp.com To: robh+dt@kernel.org, mark.rutland@arm.com, shawnguo@kernel.org, s.hauer@pengutronix.de, kernel@pengutronix.de, broonie@kernel.org, festevam@gmail.com, vkoul@kernel.org, dan.j.williams@intel.com, u.kleine-koenig@pengutronix.de, catalin.marinas@arm.com, l.stach@pengutronix.de, will.deacon@arm.com Cc: linux-spi@vger.kernel.org, linux-imx@nxp.com, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, dmaengine@vger.kernel.org, devicetree@vger.kernel.org Subject: [PATCH v5 07/15] spi: imx: remove ERR009165 workaround on i.mx6ul Date: Mon, 10 Jun 2019 16:17:45 +0800 Message-Id: <20190610081753.11422-8-yibin.gong@nxp.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190610081753.11422-1-yibin.gong@nxp.com> References: <20190610081753.11422-1-yibin.gong@nxp.com> X-Virus-Scanned: ClamAV using ClamSMTP Sender: dmaengine-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: dmaengine@vger.kernel.org From: Robin Gong ERR009165 fixed on i.mx6ul/6ull/6sll. All other i.mx6/7 and i.mx8m/8mm still need this errata. Please refer to nxp official errata document from https://www.nxp.com/ . For removing workaround on those chips. Add new i.mx6ul type. Signed-off-by: Robin Gong Acked-by: Mark Brown --- drivers/spi/spi-imx.c | 50 +++++++++++++++++++++++++++++++++++++++++++++----- 1 file changed, 45 insertions(+), 5 deletions(-) diff --git a/drivers/spi/spi-imx.c b/drivers/spi/spi-imx.c index 6795910..91660dc 100644 --- a/drivers/spi/spi-imx.c +++ b/drivers/spi/spi-imx.c @@ -57,6 +57,7 @@ enum spi_imx_devtype { IMX35_CSPI, /* CSPI on all i.mx except above */ IMX51_ECSPI, /* ECSPI on i.mx51 */ IMX53_ECSPI, /* ECSPI on i.mx53 and later */ + IMX6UL_ECSPI, /* ERR009165 fix from i.mx6ul */ }; struct spi_imx_data; @@ -75,6 +76,11 @@ struct spi_imx_devtype_data { bool has_slavemode; unsigned int fifo_size; bool dynamic_burst; + /* + * ERR009165 fixed or not: + * https://www.nxp.com/docs/en/errata/IMX6DQCE.pdf + */ + bool tx_glitch_fixed; enum spi_imx_devtype devtype; }; @@ -128,7 +134,8 @@ static inline int is_imx35_cspi(struct spi_imx_data *d) static inline int is_imx51_ecspi(struct spi_imx_data *d) { - return d->devtype_data->devtype == IMX51_ECSPI; + return d->devtype_data->devtype == IMX51_ECSPI || + d->devtype_data->devtype == IMX6UL_ECSPI; } static inline int is_imx53_ecspi(struct spi_imx_data *d) @@ -585,9 +592,16 @@ static int mx51_ecspi_prepare_transfer(struct spi_imx_data *spi_imx, ctrl |= mx51_ecspi_clkdiv(spi_imx, t->speed_hz, &clk); spi_imx->spi_bus_clk = clk; - /* ERR009165: work in XHC mode as PIO */ - if (spi_imx->usedma) - ctrl &= ~MX51_ECSPI_CTRL_SMC; + /* + * ERR009165: work in XHC mode instead of SMC as PIO on the chips + * before i.mx6ul. + */ + if (spi_imx->usedma) { + if (spi_imx->devtype_data->tx_glitch_fixed) + ctrl |= MX51_ECSPI_CTRL_SMC; + else + ctrl &= ~MX51_ECSPI_CTRL_SMC; + } writel(ctrl, spi_imx->base + MX51_ECSPI_CTRL); @@ -615,6 +629,8 @@ static void mx51_setup_wml(struct spi_imx_data *spi_imx) { u32 tx_wml = 0; + if (spi_imx->devtype_data->tx_glitch_fixed) + tx_wml = spi_imx->wml; /* * Configure the DMA register: setup the watermark * and enable DMA request. @@ -1012,6 +1028,23 @@ static struct spi_imx_devtype_data imx53_ecspi_devtype_data = { .devtype = IMX53_ECSPI, }; +static struct spi_imx_devtype_data imx6ul_ecspi_devtype_data = { + .intctrl = mx51_ecspi_intctrl, + .prepare_message = mx51_ecspi_prepare_message, + .prepare_transfer = mx51_ecspi_prepare_transfer, + .trigger = mx51_ecspi_trigger, + .rx_available = mx51_ecspi_rx_available, + .reset = mx51_ecspi_reset, + .setup_wml = mx51_setup_wml, + .fifo_size = 64, + .has_dmamode = true, + .dynamic_burst = true, + .has_slavemode = true, + .tx_glitch_fixed = true, + .disable = mx51_ecspi_disable, + .devtype = IMX6UL_ECSPI, +}; + static const struct platform_device_id spi_imx_devtype[] = { { .name = "imx1-cspi", @@ -1035,6 +1068,9 @@ static const struct platform_device_id spi_imx_devtype[] = { .name = "imx53-ecspi", .driver_data = (kernel_ulong_t) &imx53_ecspi_devtype_data, }, { + .name = "imx6ul-ecspi", + .driver_data = (kernel_ulong_t) &imx6ul_ecspi_devtype_data, + }, { /* sentinel */ } }; @@ -1047,6 +1083,7 @@ static const struct of_device_id spi_imx_dt_ids[] = { { .compatible = "fsl,imx35-cspi", .data = &imx35_cspi_devtype_data, }, { .compatible = "fsl,imx51-ecspi", .data = &imx51_ecspi_devtype_data, }, { .compatible = "fsl,imx53-ecspi", .data = &imx53_ecspi_devtype_data, }, + { .compatible = "fsl,imx6ul-ecspi", .data = &imx6ul_ecspi_devtype_data, }, { /* sentinel */ } }; MODULE_DEVICE_TABLE(of, spi_imx_dt_ids); @@ -1178,7 +1215,10 @@ static int spi_imx_dma_configure(struct spi_master *master) * For ERR009165 with tx_wml = 0 could enlarge burst size to fifo size * to speed up fifo filling as possible. */ - tx.dst_maxburst = spi_imx->devtype_data->fifo_size; + if (spi_imx->devtype_data->tx_glitch_fixed) + tx.dst_maxburst = spi_imx->wml; + else + tx.dst_maxburst = spi_imx->devtype_data->fifo_size; ret = dmaengine_slave_config(master->dma_tx, &tx); if (ret) { dev_err(spi_imx->dev, "TX dma configuration failed with %d\n", ret); -- 2.7.4