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From: Radhey Shyam Pandey <radheys@xilinx.com>
To: Vinod Koul <vkoul@kernel.org>
Cc: "dan.j.williams@intel.com" <dan.j.williams@intel.com>,
	Michal Simek <michals@xilinx.com>,
	"nick.graumann@gmail.com" <nick.graumann@gmail.com>,
	"andrea.merello@gmail.com" <andrea.merello@gmail.com>,
	Appana Durga Kedareswara Rao <appanad@xilinx.com>,
	"mcgrof@kernel.org" <mcgrof@kernel.org>,
	"dmaengine@vger.kernel.org" <dmaengine@vger.kernel.org>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	git <git@xilinx.com>
Subject: RE: [PATCH] dmaengine: xilinx_dma: Reset DMA channel in dma_terminate_all
Date: Wed, 11 Dec 2019 14:46:06 +0000	[thread overview]
Message-ID: <CH2PR02MB70009D78EA8C487BFFA54964C75A0@CH2PR02MB7000.namprd02.prod.outlook.com> (raw)
In-Reply-To: <20191210060113.GP82508@vkoul-mobl>

> -----Original Message-----
> From: Vinod Koul <vkoul@kernel.org>
> Sent: Tuesday, December 10, 2019 11:31 AM
> To: Radhey Shyam Pandey <radheys@xilinx.com>
> Cc: dan.j.williams@intel.com; Michal Simek <michals@xilinx.com>;
> nick.graumann@gmail.com; andrea.merello@gmail.com; Appana Durga
> Kedareswara Rao <appanad@xilinx.com>; mcgrof@kernel.org;
> dmaengine@vger.kernel.org; linux-kernel@vger.kernel.org; git
> <git@xilinx.com>
> Subject: Re: [PATCH] dmaengine: xilinx_dma: Reset DMA channel in
> dma_terminate_all
> 
> On 25-11-19, 12:12, Radhey Shyam Pandey wrote:
> > Reset DMA channel after stop to ensure that pending transfers and
> > FIFOs in the datapath are flushed or completed. It fixes intermittent
> > data verification failure reported by xilinx dma test client.
> >
> > Signed-off-by: Radhey Shyam Pandey <radhey.shyam.pandey@xilinx.com>
> > ---
> >  drivers/dma/xilinx/xilinx_dma.c | 17 +++++++++--------
> >  1 file changed, 9 insertions(+), 8 deletions(-)
> >
> > diff --git a/drivers/dma/xilinx/xilinx_dma.c
> > b/drivers/dma/xilinx/xilinx_dma.c index a9c5d5c..6f1539c 100644
> > --- a/drivers/dma/xilinx/xilinx_dma.c
> > +++ b/drivers/dma/xilinx/xilinx_dma.c
> > @@ -2404,16 +2404,17 @@ static int xilinx_dma_terminate_all(struct
> dma_chan *dchan)
> >  	u32 reg;
> >  	int err;
> >
> > -	if (chan->cyclic)
> > -		xilinx_dma_chan_reset(chan);
> 
> So reset is required for non cyclic cases as well now?

Yes. In absence of reset in non-cyclic case, when dmatest client
driver is stressed and loaded/unloaded multiple times we see dma 
data comparison failures. Possibly IP is prefetching/holding the
previous state and reset ensures a clean state on each iteration.
> 
> > -
> > -	err = chan->stop_transfer(chan);
> > -	if (err) {
> > -		dev_err(chan->dev, "Cannot stop channel %p: %x\n",
> > -			chan, dma_ctrl_read(chan,
> XILINX_DMA_REG_DMASR));
> > -		chan->err = true;
> > +	if (!chan->cyclic) {
> > +		err = chan->stop_transfer(chan);
> 
> no stop for cyclic now..?
After reset stop is not needed, so for the cyclic mode we only do reset.

> 
> > +		if (err) {
> > +			dev_err(chan->dev, "Cannot stop channel %p: %x\n",
> > +				chan, dma_ctrl_read(chan,
> > +				XILINX_DMA_REG_DMASR));
> > +			chan->err = true;
> > +		}
> >  	}
> >
> > +	xilinx_dma_chan_reset(chan);
> >  	/* Remove and free all of the descriptors in the lists */
> >  	xilinx_dma_free_descriptors(chan);
> >  	chan->idle = true;
> > --
> > 2.7.4
> 
> --
> ~Vinod

  reply	other threads:[~2019-12-11 14:47 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-11-25  6:42 [PATCH] dmaengine: xilinx_dma: Reset DMA channel in dma_terminate_all Radhey Shyam Pandey
2019-12-10  6:01 ` Vinod Koul
2019-12-11 14:46   ` Radhey Shyam Pandey [this message]
2019-12-18  6:04     ` Vinod Koul
2019-12-18 13:22       ` Radhey Shyam Pandey

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