RE: [EXT] [BUG BISECT] Net boot fails on VF50 after "dmaengine: fsl-edma: support little endian for edma driver"

[Peng Ma <peng.ma@nxp.com>]

[-- Attachment #1: Type: text/plain, Size: 2708 bytes --]

Hi Krzysztof,

I am sorry, It is my mistake to forget about VF50 used EDMA IP with little endian.
The Register(CHCFG0 - CHCFG15) of our platform designed as follows:
*-------------------------------------------------------------------------------*
|     Offset   | Big endian Register| Little endian Register|
|---------------------|--------------------------|-----------------------------|
|     0x0     |     CHCFG0    |     CHCFG3      |
|---------------------|--------------------------|-----------------------------|
|     0x1     |     CHCFG1    |     CHCFG2      |
|---------------------|--------------------------|-----------------------------|
|     0x2     |     CHCFG2    |     CHCFG1      |
|---------------------|--------------------------|-----------------------------|
|     0x3     |     CHCFG3    |     CHCFG0      |
|---------------------|--------------------------|-----------------------------|
|     ...      |        ......     |         ......      |
|---------------------|--------------------------|-----------------------------|
|     0xC     |     CHCFG12   |     CHCFG15     |
|---------------------|--------------------------|-----------------------------|
|     0xD     |     CHCFG13   |     CHCFG14     |
|---------------------|--------------------------|-----------------------------|
|     0xE     |     CHCFG14   |     CHCFG13     |
|---------------------|--------------------------|-----------------------------|
|     0xF     |     CHCFG15   |     CHCFG12     |
*-------------------------------------------------------------------------------*

So we need this patch, I make some changes,Please help me to test attatchment on VF50 board,
Thanks.

Best Regards,
Peng
>-----Original Message-----
>From: Krzysztof Kozłowski <k.kozlowski.k@gmail.com>
>Sent: 2019年7月2日 20:13
>To: Peng Ma <peng.ma@nxp.com>; Vinod Koul <vkoul@kernel.org>;
>dmaengine@vger.kernel.org; linux-kernel@vger.kernel.org
>Subject: [EXT] [BUG BISECT] Net boot fails on VF50 after "dmaengine:
>fsl-edma: support little endian for edma driver"
>
>Caution: EXT Email
>
>Hi,
>
>Bisect pointed commit:
>commit 002905eca5bedab08bafd9e325bbbb41670c7712
>Author: Peng Ma <peng.ma@nxp.com>
>Date:   Thu Jun 13 10:27:08 2019 +0000
>    dmaengine: fsl-edma: support little endian for edma driver
>
>as a reason of NFSv4 root boot failures. Toradex Colibri VF50 (Cortex
>A5) on Toradex Iris board.
>
>The user-space starts but hangs - a lot of messages are missing or seriously
>delayed.
>
>Please revert the patch of fix it. If needed I can provide more details about test
>system - let me know.
>
>Full log attached.
>
>Best regards,
>Krzysztof

[-- Attachment #2: 0001-dmaengine-fsl-edma-support-little-endian-for-edma-dr.patch --]
[-- Type: application/octet-stream, Size: 3060 bytes --]

From 95031d3e00a07bbfe1c987f28a4b468243799ac6 Mon Sep 17 00:00:00 2001
From: Peng Ma <peng.ma@nxp.com>
Date: Thu, 13 Jun 2019 10:27:08 +0000
Subject: [PATCH] dmaengine: fsl-edma: support little endian for edma driver

Our platforms with below registers(CHCFG0 - CHCFG15) of eDMA
*-----------------------------------------------------------*
|     Offset   | Big endian Register| Little endian Register|
|--------------|--------------------|-----------------------|
|     0x0      |        CHCFG0      |           CHCFG3      |
|--------------|--------------------|-----------------------|
|     0x1      |        CHCFG1      |           CHCFG2      |
|--------------|--------------------|-----------------------|
|     0x2      |        CHCFG2      |           CHCFG1      |
|--------------|--------------------|-----------------------|
|     0x3      |        CHCFG3      |           CHCFG0      |
|--------------|--------------------|-----------------------|
|     ...      |        ......      |           ......      |
|--------------|--------------------|-----------------------|
|     0xC      |        CHCFG12     |           CHCFG15     |
|--------------|--------------------|-----------------------|
|     0xD      |        CHCFG13     |           CHCFG14     |
|--------------|--------------------|-----------------------|
|     0xE      |        CHCFG14     |           CHCFG13     |
|--------------|--------------------|-----------------------|
|     0xF      |        CHCFG15     |           CHCFG12     |
*-----------------------------------------------------------*

Current eDMA driver does not support Little endian, so this
patch is to improve edma driver to support little endian.

Signed-off-by: Peng Ma <peng.ma@nxp.com>
Signed-off-by: Vinod Koul <vkoul@kernel.org>
---
 drivers/dma/fsl-edma-common.c |   12 ++++++++++++
 1 files changed, 12 insertions(+), 0 deletions(-)

diff --git a/drivers/dma/fsl-edma-common.c b/drivers/dma/fsl-edma-common.c
index 680b2a0..f30c203 100644
--- a/drivers/dma/fsl-edma-common.c
+++ b/drivers/dma/fsl-edma-common.c
@@ -7,6 +7,7 @@
 #include <linux/module.h>
 #include <linux/slab.h>
 #include <linux/dma-mapping.h>
+#include <linux/sys_soc.h>
 
 #include "fsl-edma-common.h"
 
@@ -42,6 +43,11 @@
 
 #define EDMA_TCD		0x1000
 
+struct soc_device_attribute soc_fixup_tuning[] = {
+	{ .family = "QorIQ LS1028A"},
+	{ },
+};
+
 static void fsl_edma_enable_request(struct fsl_edma_chan *fsl_chan)
 {
 	struct edma_regs *regs = &fsl_chan->edma->regs;
@@ -83,9 +89,15 @@ void fsl_edma_chan_mux(struct fsl_edma_chan *fsl_chan,
 	u32 ch = fsl_chan->vchan.chan.chan_id;
 	void __iomem *muxaddr;
 	unsigned int chans_per_mux, ch_off;
+	int endian_diff[4] = {3, 1, -1, -3};
 
 	chans_per_mux = fsl_chan->edma->n_chans / DMAMUX_NR;
 	ch_off = fsl_chan->vchan.chan.chan_id % chans_per_mux;
+
+	if (!fsl_chan->edma->big_endian &&
+	    soc_device_match(soc_fixup_tuning))
+		ch_off += endian_diff[ch_off % 4];
+
 	muxaddr = fsl_chan->edma->muxbase[ch / chans_per_mux];
 	slot = EDMAMUX_CHCFG_SOURCE(slot);
 
-- 
1.7.1