From: Vinod Koul <vkoul@kernel.org>
To: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Cc: Serge Semin <Sergey.Semin@baikalelectronics.ru>,
dmaengine@vger.kernel.org, linux-kernel@vger.kernel.org,
Viresh Kumar <vireshk@kernel.org>
Subject: Re: [PATCH v1 1/1] dmaengine: dw: Program xBAR hardware for Elkhart Lake
Date: Mon, 7 Jun 2021 23:53:07 +0530 [thread overview]
Message-ID: <YL5kC1gg9vdXb9xz@vkoul-mobl> (raw)
In-Reply-To: <YL4RVEIJrSMy+Slf@smile.fi.intel.com>
On 07-06-21, 15:30, Andy Shevchenko wrote:
> On Mon, Jun 07, 2021 at 05:04:57PM +0530, Vinod Koul wrote:
> > On 02-06-21, 11:56, Andy Shevchenko wrote:
> > > + case DMA_DEV_TO_DEV:
> > > + default:
> > > + value |= CTL_CH_WR_NON_SNOOP_BIT | CTL_CH_RD_NON_SNOOP_BIT;
> > > + value |= CTL_CH_TRANSFER_MODE_S2S;
> > > + break;
> >
> > aha, how did you test this...
>
> Not sure what the question is about. You are talking about last two cases
> or the entire switch? Last two weren't tested, just filed for the sake of
> being documented. First two were tested with SPI host controllers.
Last one is Device to device which is not supported by dmaengine and
cannot be tested right now!
--
~Vinod
prev parent reply other threads:[~2021-06-07 18:23 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-06-02 8:56 [PATCH v1 1/1] dmaengine: dw: Program xBAR hardware for Elkhart Lake Andy Shevchenko
2021-06-07 11:34 ` Vinod Koul
2021-06-07 12:30 ` Andy Shevchenko
2021-06-07 18:23 ` Vinod Koul [this message]
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