From mboxrd@z Thu Jan 1 00:00:00 1970 From: Daniel Vetter Subject: [PULL] drm-intel-fixes Date: Mon, 7 Oct 2013 00:41:36 +0200 Message-ID: <20131006224136.GA24915@phenom.ffwll.local> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Content-Disposition: inline List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org To: Dave Airlie Cc: Intel Graphics Development , DRI Development List-Id: dri-devel@lists.freedesktop.org Hi Dave, Just a few important fixes, all cc: stable (I've checked this time around and made sure they're really there ...). The dpms one is a regression from the modeset rework and has a good chance to rectify Linus' hdmi issues. Cheers, Daniel The following changes since commit 15c03dd4859ab16f9212238f29dd315654aa94f6: Linux 3.12-rc3 (2013-09-29 15:02:38 -0700) are available in the git repository at: git://people.freedesktop.org/~danvet/drm-intel tags/drm-intel-fixes-2013-10-07 for you to fetch changes up to c9976dcf55c8aaa7037427b239f15e5acfc01a3a: drm/i915: Only apply DPMS to the encoder if enabled (2013-10-03 22:47:39 +0200) ---------------------------------------------------------------- Chris Wilson (1): drm/i915: Only apply DPMS to the encoder if enabled Francisco Jerez (1): drm/i915/hsw: Disable L3 caching of atomic memory operations. Imre Deak (1): drm/i915: fix rps.vlv_work initialization Rodrigo Vivi (1): drm/i915: Mask LPSP to get PSR working even with Power Well in use by audio. drivers/gpu/drm/i915/i915_reg.h | 6 ++++++ drivers/gpu/drm/i915/intel_display.c | 8 ++------ drivers/gpu/drm/i915/intel_dp.c | 2 +- drivers/gpu/drm/i915/intel_pm.c | 9 +++++++-- 4 files changed, 16 insertions(+), 9 deletions(-) -- Daniel Vetter Software Engineer, Intel Corporation +41 (0) 79 365 57 48 - http://blog.ffwll.ch