[PULL] drm-intel-next

[Daniel Vetter <daniel.vetter@ffwll.ch>]

Hi Dave,

drm-intel-next-2014-03-07:
- fine-grained display power domains for byt (Imre)
- runtime pm prep patches for !hsw from Paulo
- WiZ hashing flag updates from Ville
- ppgtt setup cleanup and enabling of full 4G range on bdw (Ben)
- fixes from Jesse for the inherited intial config code
- gpu reset code improvements from Mika
- per-pipe num_planes refactoring from Damien
- stability fixes around bdw forcewake handling and other bdw w/a from Mika and
  Ken
- and as usual a pile of smaller fixes all over

The big thing here is the disabling of the full ppgtt code. I've figured
I'll need to pull the plug a bit earlier to have enough time to test thing
throughroughly before the 3.15 merge window opens.

Cheers, Daniel


The following changes since commit 4c0e552882114d1edb588242d45035246ab078a0:

  drm/i915: fix NULL deref in the load detect code (2014-02-14 17:23:12 +0100)

are available in the git repository at:

  git://anongit.freedesktop.org/drm-intel tags/drm-intel-next-2014-03-07

for you to fetch changes up to 2fae6a860ca9adb0c881f6dcd633df775c2520e9:

  drm/i915: Go OCD on the Makefile (2014-03-07 22:37:00 +0100)

----------------------------------------------------------------
- fine-grained display power domains for byt (Imre)
- runtime pm prep patches for !hsw from Paulo
- WiZ hashing flag updates from Ville
- ppgtt setup cleanup and enabling of full 4G range on bdw (Ben)
- fixes from Jesse for the inherited intial config code
- gpu reset code improvements from Mika
- per-pipe num_planes refactoring from Damien
- stability fixes around bdw forcewake handling and other bdw w/a from Mika and
  Ken
- and as usual a pile of smaller fixes all over

----------------------------------------------------------------
Ben Widawsky (12):
      drm/i915: Move ppgtt_release out of the header
      drm/i915/bdw: Free PPGTT struct
      drm/i915/bdw: Reorganize PPGTT init
      drm/i915/bdw: Split ppgtt initialization up
      drm/i915: Make clear/insert vfuncs args absolute
      drm/i915/bdw: Reorganize PT allocations
      Revert "drm/i915/bdw: Limit GTT to 2GB"
      drm/i915: Update i915_gem_gtt.c copyright
      drm/i915: Split GEN6 PPGTT cleanup
      drm/i915: Split GEN6 PPGTT initialization up
      drm/i915/bdw: Kill ppgtt->num_pt_pages
      drm/i915/bdw: Add FBC support

Brad Volkin (2):
      drm/i915: Refactor shmem pread setup
      drm/i915: Implement command buffer parsing logic

Chris Wilson (9):
      drm/i915: Revert workaround for disabling L3 cache aging on IVB
      Revert "drm/i915: enable HiZ Raw Stall Optimization on IVB"
      drm/i915: Reject changes of fb base when we have a flip pending
      drm/i915: Accurately track when we mark the hardware as idle/busy
      drm/i915: Convert the forcewake worker into a timer func
      drm/i915: Perform pageflip using mmio if the GPU is terminally wedged
      drm/i915: Reset vma->mm_list after unbinding
      drm/i915: Rely on accurate request tracking for finding hung batches
      drm/i915: Record pid/comm of hanging task

Damien Lespiau (8):
      drm/i915: Use a pipe variable to cycle through the pipes
      drm/i915: Don't declare unnecessary shadowing variable
      drm/i915: Replace a few for_each_pipe(i) by for_each_pipe(pipe)
      drm/i915: Add a for_each_sprite() macro
      drm/i915: Make num_sprites a per-pipe value
      drm/i915: Make i915_gem_retire_requests_ring() static
      drm/i915: Remove unused to_gem_object() macro
      drm/i915: Fix i915_switch_context() argument name in kerneldoc

Daniel Vetter (7):
      drm/i915: tune down user-triggerable dmesg noise in the cursor/overlay code
      drm/i915: sprinkle static
      drm/i915: s/any_enabled/!fallback/ in fbdev_initial_config
      drm/i915: ignore bios output config if not all outputs are on
      drm/i915: reverse dp link param selection, prefer fast over wide again
      drm/i915: Disable full ppgtt by default
      drm/i915: Go OCD on the Makefile

Imre Deak (21):
      drm/i915: use drm_i915_private everywhere in the power domain api
      drm/i915: switch order of power domain init wrt. irq install
      drm/i915: use power domain api to check vga power state
      drm/i915: move hsw power domain comment to its right place
      drm/i915: fold in __intel_power_well_get/put functions
      drm/i915: move modeset_update_power_wells earlier
      drm/i915: move power domain macros to intel_pm.c
      drm/i915: add init power domain to always-on power wells
      drm/i915: split power well 'set' handler to separate enable/disable/sync_hw
      drm/i915: add noop power well handlers instead of NULL checking them
      drm/i915: add port power domains
      drm/i915: get port power domain in connector detect handlers
      drm/i915: check port power domain when reading the encoder hw state
      drm/i915: check pipe power domain when reading its hw state
      drm/i915: vlv: keep first level vblank IRQs masked
      drm/i915: sanitize PUNIT register macro definitions
      drm/i915: factor out reset_vblank_counter
      drm/i915: sanity check power well sw state against hw state
      drm/i915: vlv: factor out valleyview_display_irq_install
      drm/i915: factor out intel_set_cpu_fifo_underrun_reporting_nolock
      drm/i915: power domains: add vlv power wells

Jani Nikula (1):
      drm/i915: don't flood the logs about bdw semaphores

Jesse Barnes (3):
      drm/i915: honor forced connector modes v2
      drm/i915: re-add locking around hw state readout
      drm/i915: print connector mode list in display_info

Kenneth Graunke (2):
      drm/i915: Add a partial instruction shootdown workaround on Broadwell.
      drm/i915: Add thread stall DOP clock gating workaround on Broadwell.

Mika Kuoppala (8):
      drm/i915: Fix forcewake counts for gen8
      drm/i915: Add error code into error state
      drm/i915: Add reason for capture in error state
      drm/i915: Add reset count to error state
      drm/i915: Add suspend count to error state
      drm/i915: Do forcewake reset on gen8
      drm/i915: Don't access fifodbg registers on gen8
      drm/i915: No need to put forcewake after a reset

Patrik Jakobsson (1):
      drm/i915: Don't just say it, actually force edp vdd

Paulo Zanoni (10):
      drm/i915: rename modeset_update_power_wells
      drm/i915: get/put runtime PM without holding rps.hw_lock
      drm/i915: put runtime PM only at the end of intel_mark_idle
      drm/i915: put runtime PM only when we actually release force_wake
      drm/i915: get runtime PM while trying to detect CRT
      drm/i915: get/put runtime PM in more places at i915_debugfs.c
      drm/i915: kill dev_priv->pc8.gpu_idle
      drm/i915: call assert_device_not_suspended at gen6_force_wake_work
      drm/i915: assert force wake is disabled when we runtime suspend
      drm/i915: assert we're not runtime suspended when accessing registers

Shobhit Kumar (1):
      drm/i915: Update VBT data structures to have MIPI block enhancements

Sinclair Yeh (1):
      drm/i915: Revert workaround for disabling L3 cache aging on BYT

Thierry Reding (1):
      drm/i915: Remove dead code

Ville Syrjälä (20):
      drm/i915: Fix SNB GT_MODE register setup
      drm/i915: Assume we implement WaStripsFansDisableFastClipPerformanceFix:snb
      drm/i915: There's no need to mask all 3D_CHICKEN bits on SNB
      drm/i915: Change IVB WIZ hashing mode to 16x4
      drm/i915: Change HSW WIZ hashing mode to 16x4
      drm/i915: Change BDW WIZ hashing mode to 16x4
      drm/i915: Add a comment about WIZ hashing vs. thread counts
      drm/i915: Don't ban default context when stop_rings!=0
      drm/i915: Fix VLV forcewake after reset
      drm/i915: Drop the forcewake count inc/dec around register read on VLV
      drm/i915: Streamline VLV forcewake handling
      drm/i915: Fix DDI port_clock for VGA output
      drm/i915: Use DIV_ROUND_UP() when calculating number of required FDI lanes
      drm/i915: Disable semaphore wait event idle message on BDW
      drm/i915: Implement WaDisableSDEUnitClockGating:bdw
      drm/i915: We implement WaDisableAsyncFlipPerfMode:bdw
      drm/i915: Don't clobber CHICKEN_PIPESL_1 on BDW
      drm/i915: Use RMW to update chicken bits in gen7_enable_fbc()
      drm/i915: Unify CHICKEN_PIPESL_1 register definitions
      drm/i915: Avoid div by zero when pixel clock is large

 drivers/gpu/drm/i915/Makefile              |  83 ++--
 drivers/gpu/drm/i915/i915_cmd_parser.c     | 485 ++++++++++++++++++++++
 drivers/gpu/drm/i915/i915_debugfs.c        |  79 +++-
 drivers/gpu/drm/i915/i915_dma.c            |  24 +-
 drivers/gpu/drm/i915/i915_drv.c            |  19 +-
 drivers/gpu/drm/i915/i915_drv.h            | 282 ++++++++-----
 drivers/gpu/drm/i915/i915_gem.c            |  92 +++--
 drivers/gpu/drm/i915/i915_gem_context.c    |  52 ++-
 drivers/gpu/drm/i915/i915_gem_execbuffer.c |  18 +
 drivers/gpu/drm/i915/i915_gem_gtt.c        | 621 ++++++++++++++++++++---------
 drivers/gpu/drm/i915/i915_gpu_error.c      | 272 +++++++------
 drivers/gpu/drm/i915/i915_irq.c            | 208 +++++++---
 drivers/gpu/drm/i915/i915_params.c         |   5 +
 drivers/gpu/drm/i915/i915_reg.h            |  69 +++-
 drivers/gpu/drm/i915/intel_bios.c          |   4 +-
 drivers/gpu/drm/i915/intel_bios.h          | 174 ++++++--
 drivers/gpu/drm/i915/intel_crt.c           |  57 ++-
 drivers/gpu/drm/i915/intel_ddi.c           |   5 +
 drivers/gpu/drm/i915/intel_display.c       | 363 ++++++++++-------
 drivers/gpu/drm/i915/intel_dp.c            |  43 +-
 drivers/gpu/drm/i915/intel_drv.h           |  21 +-
 drivers/gpu/drm/i915/intel_dsi.c           |  18 +-
 drivers/gpu/drm/i915/intel_fbdev.c         |  49 ++-
 drivers/gpu/drm/i915/intel_hdmi.c          |  34 +-
 drivers/gpu/drm/i915/intel_overlay.c       |   2 +-
 drivers/gpu/drm/i915/intel_pm.c            | 575 +++++++++++++++++++++-----
 drivers/gpu/drm/i915/intel_ringbuffer.c    |   4 +-
 drivers/gpu/drm/i915/intel_ringbuffer.h    |  32 ++
 drivers/gpu/drm/i915/intel_uncore.c        | 227 ++++++-----
 29 files changed, 2897 insertions(+), 1020 deletions(-)
 create mode 100644 drivers/gpu/drm/i915/i915_cmd_parser.c

-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch