On 12/03/2020 16:02, speck for Luck, Tony wrote:
> On Thu, Mar 12, 2020 at 08:25:01AM -0700, speck for Luck, Tony wrote:
>> On Thu, Mar 12, 2020 at 01:34:50AM +0000, speck for Andrew Cooper wrote:
>>> Particularly with this issue where it seems that no hypervisor is
>>> interested in offering the knob to guest kernels (so could at least
>>> infer based on SRBDS_CTRL), nor is there an ARCH_CAPS_$FOO_NO bit which
>>> could be filled in by a hypervisor on unaffected or mitigated hardware.
>> Maybe that is the solution?  We allocated a s/w (VMM) bit in
>> ARCH_CAPABILITIES for the TLB DoS issue for the nested hypervisor case.
>> Should we do that again for this issue?
> Bah, memory fail. I was actually thinking of bit 3 SKIP_L1DFL_VMENTRY
> that told a nested VMM it didn't need to flush L1D again for L1TF as
> an outer VMM was already handling that.
>
>> If you think so, then we can take this discussion to Keybase so
>> that the other VMM vendors who hang out there can chime in.
>>
>> [Note that it isn't my call to allocate a bit in ARCH_CAPABILITIES,
>> but I can campaign for it if folks want it].

I think it would certainly be worth while asking.

~Andrew