From: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: linux-fbdev@vger.kernel.org, dri-devel@lists.freedesktop.org
Subject: [Intel-gfx] [PATCH v6 07/18] drm: Add logging function for DP VSC SDP
Date: Mon, 10 Feb 2020 19:10:10 +0200 [thread overview]
Message-ID: <20200210171021.109684-8-gwan-gyeong.mun@intel.com> (raw)
In-Reply-To: <20200210171021.109684-1-gwan-gyeong.mun@intel.com>
When receiving video it is very useful to be able to log DP VSC SDP.
This greatly simplifies debugging.
v2: Minor style fix
v3: Move logging functions to drm core [Jani N]
v5: Rebased
Signed-off-by: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com>
Reviewed-by: Uma Shankar <uma.shankar@intel.com>
---
drivers/gpu/drm/drm_dp_helper.c | 174 ++++++++++++++++++++++++++++++++
include/drm/drm_dp_helper.h | 3 +
2 files changed, 177 insertions(+)
diff --git a/drivers/gpu/drm/drm_dp_helper.c b/drivers/gpu/drm/drm_dp_helper.c
index 5a103e9b3c86..17059ed4763b 100644
--- a/drivers/gpu/drm/drm_dp_helper.c
+++ b/drivers/gpu/drm/drm_dp_helper.c
@@ -1395,3 +1395,177 @@ int drm_dp_dsc_sink_supported_input_bpcs(const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_S
return num_bpc;
}
EXPORT_SYMBOL(drm_dp_dsc_sink_supported_input_bpcs);
+
+static const char *dp_pixelformat_get_name(enum dp_pixelformat pixelformat)
+{
+ if (pixelformat < 0 || pixelformat > DP_PIXELFORMAT_RESERVED)
+ return "Invalid";
+
+ switch (pixelformat) {
+ case DP_PIXELFORMAT_RGB:
+ return "RGB";
+ case DP_PIXELFORMAT_YUV444:
+ return "YUV444";
+ case DP_PIXELFORMAT_YUV422:
+ return "YUV422";
+ case DP_PIXELFORMAT_YUV420:
+ return "YUV420";
+ case DP_PIXELFORMAT_Y_ONLY:
+ return "Y_ONLY";
+ case DP_PIXELFORMAT_RAW:
+ return "RAW";
+ default:
+ return "Reserved";
+ }
+}
+
+static const char *dp_colorimetry_get_name(enum dp_pixelformat pixelformat,
+ enum dp_colorimetry colorimetry)
+{
+ if (pixelformat < 0 || pixelformat > DP_PIXELFORMAT_RESERVED)
+ return "Invalid";
+
+ switch (colorimetry) {
+ case DP_COLORIMETRY_DEFAULT:
+ switch (pixelformat) {
+ case DP_PIXELFORMAT_RGB:
+ return "sRGB";
+ case DP_PIXELFORMAT_YUV444:
+ case DP_PIXELFORMAT_YUV422:
+ case DP_PIXELFORMAT_YUV420:
+ return "BT.601";
+ case DP_PIXELFORMAT_Y_ONLY:
+ return "DICOM PS3.14";
+ case DP_PIXELFORMAT_RAW:
+ return "Custom Color Profile";
+ default:
+ return "Reserved";
+ }
+ case DP_COLORIMETRY_RGB_WIDE_FIXED: /* and DP_COLORIMETRY_BT709_YCC */
+ switch (pixelformat) {
+ case DP_PIXELFORMAT_RGB:
+ return "Wide Fixed";
+ case DP_PIXELFORMAT_YUV444:
+ case DP_PIXELFORMAT_YUV422:
+ case DP_PIXELFORMAT_YUV420:
+ return "BT.709";
+ default:
+ return "Reserved";
+ }
+ case DP_COLORIMETRY_RGB_WIDE_FLOAT: /* and DP_COLORIMETRY_XVYCC_601 */
+ switch (pixelformat) {
+ case DP_PIXELFORMAT_RGB:
+ return "Wide Float";
+ case DP_PIXELFORMAT_YUV444:
+ case DP_PIXELFORMAT_YUV422:
+ case DP_PIXELFORMAT_YUV420:
+ return "xvYCC 601";
+ default:
+ return "Reserved";
+ }
+ case DP_COLORIMETRY_OPRGB: /* and DP_COLORIMETRY_XVYCC_709 */
+ switch (pixelformat) {
+ case DP_PIXELFORMAT_RGB:
+ return "OpRGB";
+ case DP_PIXELFORMAT_YUV444:
+ case DP_PIXELFORMAT_YUV422:
+ case DP_PIXELFORMAT_YUV420:
+ return "xvYCC 709";
+ default:
+ return "Reserved";
+ }
+ case DP_COLORIMETRY_DCI_P3_RGB: /* and DP_COLORIMETRY_SYCC_601 */
+ switch (pixelformat) {
+ case DP_PIXELFORMAT_RGB:
+ return "DCI-P3";
+ case DP_PIXELFORMAT_YUV444:
+ case DP_PIXELFORMAT_YUV422:
+ case DP_PIXELFORMAT_YUV420:
+ return "sYCC 601";
+ default:
+ return "Reserved";
+ }
+ case DP_COLORIMETRY_RGB_CUSTOM: /* and DP_COLORIMETRY_OPYCC_601 */
+ switch (pixelformat) {
+ case DP_PIXELFORMAT_RGB:
+ return "Custom Profile";
+ case DP_PIXELFORMAT_YUV444:
+ case DP_PIXELFORMAT_YUV422:
+ case DP_PIXELFORMAT_YUV420:
+ return "OpYCC 601";
+ default:
+ return "Reserved";
+ }
+ case DP_COLORIMETRY_BT2020_RGB: /* and DP_COLORIMETRY_BT2020_CYCC */
+ switch (pixelformat) {
+ case DP_PIXELFORMAT_RGB:
+ return "BT.2020 RGB";
+ case DP_PIXELFORMAT_YUV444:
+ case DP_PIXELFORMAT_YUV422:
+ case DP_PIXELFORMAT_YUV420:
+ return "BT.2020 CYCC";
+ default:
+ return "Reserved";
+ }
+ case DP_COLORIMETRY_BT2020_YCC:
+ switch (pixelformat) {
+ case DP_PIXELFORMAT_YUV444:
+ case DP_PIXELFORMAT_YUV422:
+ case DP_PIXELFORMAT_YUV420:
+ return "BT.2020 YCC";
+ default:
+ return "Reserved";
+ }
+ default:
+ return "Invalid";
+ }
+}
+
+static const char *dp_dynamic_range_get_name(enum dp_dynamic_range dynamic_range)
+{
+ switch (dynamic_range) {
+ case DP_DYNAMIC_RANGE_VESA:
+ return "VESA range";
+ case DP_DYNAMIC_RANGE_CTA:
+ return "CTA range";
+ default:
+ return "Invalid";
+ }
+}
+
+static const char *dp_content_type_get_name(enum dp_content_type content_type)
+{
+ switch (content_type) {
+ case DP_CONTENT_TYPE_NOT_DEFINED:
+ return "Not defined";
+ case DP_CONTENT_TYPE_GRAPHICS:
+ return "Graphics";
+ case DP_CONTENT_TYPE_PHOTO:
+ return "Photo";
+ case DP_CONTENT_TYPE_VIDEO:
+ return "Video";
+ case DP_CONTENT_TYPE_GAME:
+ return "Game";
+ default:
+ return "Reserved";
+ }
+}
+
+void drm_dp_vsc_sdp_log(const char *level, struct device *dev,
+ const struct drm_dp_vsc_sdp *vsc)
+{
+#define DP_SDP_LOG(fmt, ...) dev_printk(level, dev, fmt, ##__VA_ARGS__)
+ DP_SDP_LOG("DP SDP: %s, revision %u, length %u\n", "VSC",
+ vsc->revision, vsc->length);
+ DP_SDP_LOG(" pixelformat: %s\n",
+ dp_pixelformat_get_name(vsc->pixelformat));
+ DP_SDP_LOG(" colorimetry: %s\n",
+ dp_colorimetry_get_name(vsc->pixelformat, vsc->colorimetry));
+ DP_SDP_LOG(" bpc: %u\n", vsc->bpc);
+ DP_SDP_LOG(" dynamic range: %s\n",
+ dp_dynamic_range_get_name(vsc->dynamic_range));
+ DP_SDP_LOG(" content type: %s\n",
+ dp_content_type_get_name(vsc->content_type));
+#undef DP_SDP_LOG
+}
+EXPORT_SYMBOL(drm_dp_vsc_sdp_log);
diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h
index e332f54013d7..331bb0c2512e 100644
--- a/include/drm/drm_dp_helper.h
+++ b/include/drm/drm_dp_helper.h
@@ -1339,6 +1339,9 @@ struct drm_dp_vsc_sdp {
enum dp_content_type content_type;
};
+void drm_dp_vsc_sdp_log(const char *level, struct device *dev,
+ const struct drm_dp_vsc_sdp *vsc);
+
int drm_dp_psr_setup_time(const u8 psr_cap[EDP_PSR_RECEIVER_CAP_SIZE]);
static inline int
--
2.25.0
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next prev parent reply other threads:[~2020-02-10 17:10 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-02-10 17:10 [Intel-gfx] [PATCH v6 00/18] In order to readout DP SDPs, refactors the handling of DP SDPs Gwan-gyeong Mun
2020-02-10 17:10 ` [Intel-gfx] [PATCH v6 01/18] drm: Add DP1.4 VSC SDP Payload related Data Structures Gwan-gyeong Mun
2020-02-10 17:10 ` [Intel-gfx] [PATCH v6 02/18] drm/i915/dp: Add compute routine for DP VSC SDP Gwan-gyeong Mun
2020-02-10 17:10 ` [Intel-gfx] [PATCH v6 03/18] drm/i915/dp: Add compute routine for DP HDR Metadata Infoframe SDP Gwan-gyeong Mun
2020-02-10 17:10 ` [Intel-gfx] [PATCH v6 04/18] drm/i915/dp: Add writing of DP SDPs Gwan-gyeong Mun
2020-02-10 17:10 ` [Intel-gfx] [PATCH v6 05/18] video/hdmi: Add Unpack only function for DRM infoframe Gwan-gyeong Mun
2020-02-10 17:10 ` [Intel-gfx] [PATCH v6 06/18] drm/i915/dp: Read out DP SDPs Gwan-gyeong Mun
2020-02-10 17:10 ` Gwan-gyeong Mun [this message]
2020-02-10 17:10 ` [Intel-gfx] [PATCH v6 08/18] drm/i915: Include HDMI DRM infoframe in the crtc state dump Gwan-gyeong Mun
2020-02-10 17:10 ` [Intel-gfx] [PATCH v6 09/18] drm/i915: Include DP HDR Metadata Infoframe SDP " Gwan-gyeong Mun
2020-02-10 17:10 ` [Intel-gfx] [PATCH v6 10/18] drm/i915: Include DP VSC " Gwan-gyeong Mun
2020-02-10 17:10 ` [Intel-gfx] [PATCH v6 11/18] drm/i915: Program DP SDPs with computed configs Gwan-gyeong Mun
2020-02-10 17:10 ` [Intel-gfx] [PATCH v6 12/18] drm/i915: Add state readout for DP HDR Metadata Infoframe SDP Gwan-gyeong Mun
2020-02-10 17:10 ` [Intel-gfx] [PATCH v6 13/18] drm/i915: Add state readout for DP VSC SDP Gwan-gyeong Mun
2020-02-10 17:10 ` [Intel-gfx] [PATCH v6 14/18] drm/i915: Fix enabled infoframe states of lspcon Gwan-gyeong Mun
2020-03-16 5:19 ` Shankar, Uma
2020-02-10 17:10 ` [Intel-gfx] [PATCH v6 15/18] drm/i915: Program DP SDPs on pipe updates Gwan-gyeong Mun
2020-02-10 17:10 ` [Intel-gfx] [PATCH v6 16/18] drm/i915: Stop sending DP SDPs on ddi disable Gwan-gyeong Mun
2020-02-10 17:10 ` [Intel-gfx] [PATCH v6 17/18] drm/i915/dp: Add compute routine for DP PSR VSC SDP Gwan-gyeong Mun
2020-02-10 17:10 ` [Intel-gfx] [PATCH v6 18/18] drm/i915/psr: Use new DP VSC SDP compute routine on PSR Gwan-gyeong Mun
2020-02-10 19:39 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for In order to readout DP SDPs, refactors the handling of DP SDPs (rev6) Patchwork
2020-02-10 20:04 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
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