From: Chris Wilson <chris@chris-wilson.co.uk>
To: intel-gfx@lists.freedesktop.org
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Subject: [Intel-gfx] [PATCH 17/22] drm/i915/gem: Assign context id for async work
Date: Mon, 4 May 2020 05:48:58 +0100 [thread overview]
Message-ID: <20200504044903.7626-17-chris@chris-wilson.co.uk> (raw)
In-Reply-To: <20200504044903.7626-1-chris@chris-wilson.co.uk>
Allocate a few dma fence context id that we can use to associate async work
[for the CPU] launched on behalf of this context. For extra fun, we allow
a configurable concurrency width.
A current example would be that we spawn an unbound worker for every
userptr get_pages. In the future, we wish to charge this work to the
context that initiated the async work and to impose concurrency limits
based on the context.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
---
drivers/gpu/drm/i915/gem/i915_gem_context.c | 4 ++++
drivers/gpu/drm/i915/gem/i915_gem_context.h | 6 ++++++
drivers/gpu/drm/i915/gem/i915_gem_context_types.h | 6 ++++++
3 files changed, 16 insertions(+)
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_context.c b/drivers/gpu/drm/i915/gem/i915_gem_context.c
index 900ea8b7fc8f..fd7d064a0e46 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_context.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_context.c
@@ -715,6 +715,10 @@ __create_context(struct drm_i915_private *i915)
ctx->sched.priority = I915_USER_PRIORITY(I915_PRIORITY_NORMAL);
mutex_init(&ctx->mutex);
+ ctx->async.width = rounddown_pow_of_two(num_online_cpus());
+ ctx->async.context = dma_fence_context_alloc(ctx->async.width);
+ ctx->async.width--;
+
spin_lock_init(&ctx->stale.lock);
INIT_LIST_HEAD(&ctx->stale.engines);
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_context.h b/drivers/gpu/drm/i915/gem/i915_gem_context.h
index 3702b2fb27ab..e104ff0ae740 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_context.h
+++ b/drivers/gpu/drm/i915/gem/i915_gem_context.h
@@ -134,6 +134,12 @@ int i915_gem_context_setparam_ioctl(struct drm_device *dev, void *data,
int i915_gem_context_reset_stats_ioctl(struct drm_device *dev, void *data,
struct drm_file *file);
+static inline u64 i915_gem_context_async_id(struct i915_gem_context *ctx)
+{
+ return (ctx->async.context +
+ (atomic_fetch_inc(&ctx->async.cur) & ctx->async.width));
+}
+
static inline struct i915_gem_context *
i915_gem_context_get(struct i915_gem_context *ctx)
{
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_context_types.h b/drivers/gpu/drm/i915/gem/i915_gem_context_types.h
index 28760bd03265..5f5cfa3a3e9b 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_context_types.h
+++ b/drivers/gpu/drm/i915/gem/i915_gem_context_types.h
@@ -85,6 +85,12 @@ struct i915_gem_context {
struct intel_timeline *timeline;
+ struct {
+ u64 context;
+ atomic_t cur;
+ unsigned int width;
+ } async;
+
/**
* @vm: unique address space (GTT)
*
--
2.20.1
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next prev parent reply other threads:[~2020-05-04 4:49 UTC|newest]
Thread overview: 41+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-05-04 4:48 [Intel-gfx] [PATCH 01/22] drm/i915: Allow some leniency in PCU reads Chris Wilson
2020-05-04 4:48 ` [Intel-gfx] [PATCH 02/22] drm/i915/gem: Specify address type for chained reloc batches Chris Wilson
2020-05-04 11:49 ` Tvrtko Ursulin
2020-05-04 11:53 ` Chris Wilson
2020-05-04 12:15 ` Tvrtko Ursulin
2020-05-04 4:48 ` [Intel-gfx] [PATCH 03/22] drm/i915/gem: Implement legacy MI_STORE_DATA_IMM Chris Wilson
2020-05-04 12:58 ` Tvrtko Ursulin
2020-05-04 13:08 ` Chris Wilson
2020-05-04 13:22 ` [Intel-gfx] [PATCH v2] " Chris Wilson
2020-05-04 13:33 ` Tvrtko Ursulin
2020-05-04 4:48 ` [Intel-gfx] [PATCH 04/22] drm/i915/gt: Small tidy of gen8+ breadcrumb emission Chris Wilson
2020-05-04 4:48 ` [Intel-gfx] [PATCH 05/22] drm/i915: Mark concurrent submissions with a weak-dependency Chris Wilson
2020-05-04 4:48 ` [Intel-gfx] [PATCH 06/22] drm/i915/selftests: Repeat the rps clock frequency measurement Chris Wilson
2020-05-04 17:17 ` Mika Kuoppala
2020-05-04 4:48 ` [Intel-gfx] [PATCH 07/22] drm/i915/gt: Stop holding onto the pinned_default_state Chris Wilson
2020-05-05 20:08 ` Andi Shyti
2020-05-05 20:13 ` Chris Wilson
2020-05-04 4:48 ` [Intel-gfx] [PATCH 08/22] dma-buf: Proxy fence, an unsignaled fence placeholder Chris Wilson
2020-05-04 4:48 ` [Intel-gfx] [PATCH 09/22] drm/syncobj: Allow use of dma-fence-proxy Chris Wilson
2020-05-04 4:48 ` [Intel-gfx] [PATCH 10/22] drm/i915/gem: Teach execbuf how to wait on future syncobj Chris Wilson
2020-05-04 4:48 ` [Intel-gfx] [PATCH 11/22] drm/i915/gem: Allow combining submit-fences with syncobj Chris Wilson
2020-05-04 4:48 ` [Intel-gfx] [PATCH 12/22] drm/i915/gt: Declare when we enabled timeslicing Chris Wilson
2020-05-04 4:48 ` [Intel-gfx] [PATCH 13/22] drm/i915: Replace the hardcoded I915_FENCE_TIMEOUT Chris Wilson
2020-05-04 4:48 ` [Intel-gfx] [PATCH 14/22] drm/i915: Drop I915_RESET_TIMEOUT and friends Chris Wilson
2020-05-04 4:48 ` [Intel-gfx] [PATCH 15/22] drm/i915: Drop I915_IDLE_ENGINES_TIMEOUT Chris Wilson
2020-05-04 4:48 ` [Intel-gfx] [PATCH 16/22] drm/i915: Always defer fenced work to the worker Chris Wilson
2020-05-04 4:48 ` Chris Wilson [this message]
2020-05-04 4:48 ` [Intel-gfx] [PATCH 18/22] drm/i915: Export a preallocate variant of i915_active_acquire() Chris Wilson
2020-05-04 4:49 ` [Intel-gfx] [PATCH 19/22] drm/i915/gem: Separate the ww_mutex walker into its own list Chris Wilson
2020-05-04 4:49 ` [Intel-gfx] [PATCH 20/22] drm/i915/gem: Asynchronous GTT unbinding Chris Wilson
2020-05-04 4:49 ` [Intel-gfx] [PATCH 21/22] drm/i915/gem: Bind the fence async for execbuf Chris Wilson
2020-05-04 4:49 ` [Intel-gfx] [PATCH 22/22] drm/i915/gem: Lazily acquire the device wakeref for freeing objects Chris Wilson
2020-05-04 5:16 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [01/22] drm/i915: Allow some leniency in PCU reads Patchwork
2020-05-04 5:40 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2020-05-04 9:52 ` [Intel-gfx] [PATCH 01/22] " Mika Kuoppala
2020-05-04 10:00 ` Chris Wilson
2020-05-04 13:43 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [01/22] drm/i915: Allow some leniency in PCU reads (rev2) Patchwork
2020-05-04 13:49 ` [Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [01/22] drm/i915: Allow some leniency in PCU reads Patchwork
2020-05-04 14:07 ` [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [01/22] drm/i915: Allow some leniency in PCU reads (rev2) Patchwork
2020-05-05 1:31 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
2020-05-20 7:54 [Intel-gfx] [PATCH 01/22] drm/i915/gem: Suppress some random warnings Chris Wilson
2020-05-20 7:54 ` [Intel-gfx] [PATCH 17/22] drm/i915/gem: Assign context id for async work Chris Wilson
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