From: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
To: "José Roberto de Souza" <jose.souza@intel.com>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH v2 1/2] drm/i915/tgl: Implement WA 18011464164
Date: Wed, 1 Jul 2020 14:57:22 +0300 [thread overview]
Message-ID: <20200701115722.GY6112@intel.com> (raw)
In-Reply-To: <20200701010655.226379-1-jose.souza@intel.com>
On Tue, Jun 30, 2020 at 06:06:54PM -0700, José Roberto de Souza wrote:
> This fix some possible corruptions.
>
> v2:
> Renamed SLICE_UNIT_LEVEL_CLOCK_GATING_CTL to
> SLICE_UNIT_LEVEL_CLKGATE_CTL_94D8
Spec people are getting creative with the naming :/
>
> BSpec: 52755
> BSpec: 52890
> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
> ---
> drivers/gpu/drm/i915/i915_reg.h | 3 +++
> drivers/gpu/drm/i915/intel_pm.c | 8 +++++++-
> 2 files changed, 10 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index 9d6536afc94b..76bc70d214b6 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -4174,6 +4174,9 @@ enum {
> #define INF_UNIT_LEVEL_CLKGATE _MMIO(0x9560)
> #define CGPSF_CLKGATE_DIS (1 << 3)
>
> +#define SLICE_UNIT_LEVEL_CLKGATE_CTL_94D8 _MMIO(0x94D8)
> +#define GS_UNIT_CLOCK_GATING_DIS REG_BIT(24)
> +
> /*
> * Display engine regs
> */
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index 2a32d6230795..80293e3e48ad 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -7113,7 +7113,7 @@ static void tgl_init_clock_gating(struct drm_i915_private *dev_priv)
> I915_WRITE(POWERGATE_ENABLE,
> I915_READ(POWERGATE_ENABLE) | vd_pg_enable);
>
> - /* Wa_1409825376:tgl (pre-prod)*/
> + /* Wa_1409825376:tgl (pre-prod) */
> if (IS_TGL_REVID(dev_priv, TGL_REVID_A0, TGL_REVID_A0))
> I915_WRITE(GEN9_CLKGATE_DIS_3, I915_READ(GEN9_CLKGATE_DIS_3) |
> TGL_VRH_GATING_DIS);
> @@ -7121,6 +7121,12 @@ static void tgl_init_clock_gating(struct drm_i915_private *dev_priv)
> /* Wa_14011059788:tgl */
> intel_uncore_rmw(&dev_priv->uncore, GEN10_DFR_RATIO_EN_AND_CHICKEN,
> 0, DFR_DISABLE);
> +
> + /* Wa_18011464164:tgl */
> + if (IS_TGL_REVID(dev_priv, TGL_REVID_B0, TGL_REVID_B0))
> + intel_uncore_rmw(&dev_priv->uncore,
> + SLICE_UNIT_LEVEL_CLKGATE_CTL_94D8, 0,
> + GS_UNIT_CLOCK_GATING_DIS);
Still looks like the wrong place for gt w/as though.
> }
>
> static void cnp_init_clock_gating(struct drm_i915_private *dev_priv)
> --
> 2.27.0
--
Ville Syrjälä
Intel
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
next prev parent reply other threads:[~2020-07-01 11:57 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-07-01 1:06 [Intel-gfx] [PATCH v2 1/2] drm/i915/tgl: Implement WA 18011464164 José Roberto de Souza
2020-07-01 1:06 ` [Intel-gfx] [PATCH v2 2/2] drm/i915/tgl: Implement WA 22010931296 José Roberto de Souza
2020-07-01 3:40 ` [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [v2,1/2] drm/i915/tgl: Implement WA 18011464164 Patchwork
2020-07-01 10:06 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2020-07-01 11:57 ` Ville Syrjälä [this message]
2020-07-01 11:59 ` [Intel-gfx] [PATCH v2 1/2] " Ville Syrjälä
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20200701115722.GY6112@intel.com \
--to=ville.syrjala@linux.intel.com \
--cc=intel-gfx@lists.freedesktop.org \
--cc=jose.souza@intel.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).