From: Matt Roper <matthew.d.roper@intel.com>
To: Lucas De Marchi <lucas.demarchi@intel.com>
Cc: dri-devel@lists.freedesktop.org,
Daniel Vetter <daniel.vetter@ffwll.ch>,
intel-gfx@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH 23/30] drm/i915/gt: remove explicit CNL handling from intel_sseu.c
Date: Mon, 26 Jul 2021 16:21:19 -0700 [thread overview]
Message-ID: <20210726232119.GW1556418@mdroper-desk1.amr.corp.intel.com> (raw)
In-Reply-To: <20210724001114.249295-24-lucas.demarchi@intel.com>
On Fri, Jul 23, 2021 at 05:11:07PM -0700, Lucas De Marchi wrote:
> CNL is the only platform with GRAPHICS_VER == 10. With its removal we
> don't need to handle that version anymore.
>
> Also we can now reduce the max number of slices: the call to
> intel_sseu_set_info() with the highest number of slices comes from SKL
> and BDW with 3 slices. Recent platforms actually increase the
> number of subslices so the number of slices remain 1.
>
> Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
> ---
> drivers/gpu/drm/i915/gt/intel_sseu.c | 79 ----------------------------
> drivers/gpu/drm/i915/gt/intel_sseu.h | 2 +-
> 2 files changed, 1 insertion(+), 80 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/gt/intel_sseu.c b/drivers/gpu/drm/i915/gt/intel_sseu.c
> index 367fd44b81c8..9542c3f3822a 100644
> --- a/drivers/gpu/drm/i915/gt/intel_sseu.c
> +++ b/drivers/gpu/drm/i915/gt/intel_sseu.c
> @@ -188,83 +188,6 @@ static void gen11_sseu_info_init(struct intel_gt *gt)
> sseu->has_eu_pg = 1;
> }
>
> -static void gen10_sseu_info_init(struct intel_gt *gt)
> -{
> - struct intel_uncore *uncore = gt->uncore;
> - struct sseu_dev_info *sseu = >->info.sseu;
> - const u32 fuse2 = intel_uncore_read(uncore, GEN8_FUSE2);
> - const int eu_mask = 0xff;
> - u32 subslice_mask, eu_en;
> - int s, ss;
> -
> - intel_sseu_set_info(sseu, 6, 4, 8);
> -
> - sseu->slice_mask = (fuse2 & GEN10_F2_S_ENA_MASK) >>
> - GEN10_F2_S_ENA_SHIFT;
> -
> - /* Slice0 */
> - eu_en = ~intel_uncore_read(uncore, GEN8_EU_DISABLE0);
> - for (ss = 0; ss < sseu->max_subslices; ss++)
> - sseu_set_eus(sseu, 0, ss, (eu_en >> (8 * ss)) & eu_mask);
> - /* Slice1 */
> - sseu_set_eus(sseu, 1, 0, (eu_en >> 24) & eu_mask);
> - eu_en = ~intel_uncore_read(uncore, GEN8_EU_DISABLE1);
> - sseu_set_eus(sseu, 1, 1, eu_en & eu_mask);
> - /* Slice2 */
> - sseu_set_eus(sseu, 2, 0, (eu_en >> 8) & eu_mask);
> - sseu_set_eus(sseu, 2, 1, (eu_en >> 16) & eu_mask);
> - /* Slice3 */
> - sseu_set_eus(sseu, 3, 0, (eu_en >> 24) & eu_mask);
> - eu_en = ~intel_uncore_read(uncore, GEN8_EU_DISABLE2);
> - sseu_set_eus(sseu, 3, 1, eu_en & eu_mask);
> - /* Slice4 */
> - sseu_set_eus(sseu, 4, 0, (eu_en >> 8) & eu_mask);
> - sseu_set_eus(sseu, 4, 1, (eu_en >> 16) & eu_mask);
> - /* Slice5 */
> - sseu_set_eus(sseu, 5, 0, (eu_en >> 24) & eu_mask);
> - eu_en = ~intel_uncore_read(uncore, GEN10_EU_DISABLE3);
> - sseu_set_eus(sseu, 5, 1, eu_en & eu_mask);
> -
> - subslice_mask = (1 << 4) - 1;
> - subslice_mask &= ~((fuse2 & GEN10_F2_SS_DIS_MASK) >>
> - GEN10_F2_SS_DIS_SHIFT);
> -
> - for (s = 0; s < sseu->max_slices; s++) {
> - u32 subslice_mask_with_eus = subslice_mask;
> -
> - for (ss = 0; ss < sseu->max_subslices; ss++) {
> - if (sseu_get_eus(sseu, s, ss) == 0)
> - subslice_mask_with_eus &= ~BIT(ss);
> - }
> -
> - /*
> - * Slice0 can have up to 3 subslices, but there are only 2 in
> - * slice1/2.
> - */
> - intel_sseu_set_subslices(sseu, s, s == 0 ?
> - subslice_mask_with_eus :
> - subslice_mask_with_eus & 0x3);
> - }
> -
> - sseu->eu_total = compute_eu_total(sseu);
> -
> - /*
> - * CNL is expected to always have a uniform distribution
> - * of EU across subslices with the exception that any one
> - * EU in any one subslice may be fused off for die
> - * recovery.
> - */
> - sseu->eu_per_subslice =
> - intel_sseu_subslice_total(sseu) ?
> - DIV_ROUND_UP(sseu->eu_total, intel_sseu_subslice_total(sseu)) :
> - 0;
> -
> - /* No restrictions on Power Gating */
> - sseu->has_slice_pg = 1;
> - sseu->has_subslice_pg = 1;
> - sseu->has_eu_pg = 1;
> -}
> -
> static void cherryview_sseu_info_init(struct intel_gt *gt)
> {
> struct sseu_dev_info *sseu = >->info.sseu;
> @@ -592,8 +515,6 @@ void intel_sseu_info_init(struct intel_gt *gt)
> bdw_sseu_info_init(gt);
> else if (GRAPHICS_VER(i915) == 9)
> gen9_sseu_info_init(gt);
> - else if (GRAPHICS_VER(i915) == 10)
> - gen10_sseu_info_init(gt);
> else if (GRAPHICS_VER(i915) == 11)
> gen11_sseu_info_init(gt);
> else if (GRAPHICS_VER(i915) >= 12)
> diff --git a/drivers/gpu/drm/i915/gt/intel_sseu.h b/drivers/gpu/drm/i915/gt/intel_sseu.h
> index 4cd1a8a7298a..8d85ec05f610 100644
> --- a/drivers/gpu/drm/i915/gt/intel_sseu.h
> +++ b/drivers/gpu/drm/i915/gt/intel_sseu.h
> @@ -15,7 +15,7 @@ struct drm_i915_private;
> struct intel_gt;
> struct drm_printer;
>
> -#define GEN_MAX_SLICES (6) /* CNL upper bound */
> +#define GEN_MAX_SLICES (3) /* SKL upper bound */
> #define GEN_MAX_SUBSLICES (8) /* ICL upper bound */
> #define GEN_SSEU_STRIDE(max_entries) DIV_ROUND_UP(max_entries, BITS_PER_BYTE)
> #define GEN_MAX_SUBSLICE_STRIDE GEN_SSEU_STRIDE(GEN_MAX_SUBSLICES)
> --
> 2.31.1
>
--
Matt Roper
Graphics Software Engineer
VTT-OSGC Platform Enablement
Intel Corporation
(916) 356-2795
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
next prev parent reply other threads:[~2021-07-26 23:21 UTC|newest]
Thread overview: 75+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-07-24 0:10 [Intel-gfx] [PATCH 00/30] Remove CNL support Lucas De Marchi
2021-07-24 0:10 ` [Intel-gfx] [PATCH 01/30] drm/i915: fix not reading DSC disable fuse in GLK Lucas De Marchi
2021-07-24 18:03 ` Matt Roper
2021-07-24 0:10 ` [Intel-gfx] [PATCH 02/30] drm/i915/display: split DISPLAY_VER 9 and 10 in intel_setup_outputs() Lucas De Marchi
2021-07-24 17:41 ` Christoph Hellwig
2021-07-25 5:02 ` Lucas De Marchi
2021-07-26 10:20 ` Rodrigo Vivi
2021-07-26 14:01 ` Lucas De Marchi
2021-07-24 0:10 ` [Intel-gfx] [PATCH 03/30] drm/i915/display: remove PORT_F workaround for CNL Lucas De Marchi
2021-07-24 18:05 ` Matt Roper
2021-07-24 0:10 ` [Intel-gfx] [PATCH 04/30] drm/i915/display: remove explicit CNL handling from intel_cdclk.c Lucas De Marchi
2021-07-24 18:12 ` Matt Roper
2021-07-27 6:12 ` Lucas De Marchi
2021-07-24 0:10 ` [Intel-gfx] [PATCH 05/30] drm/i915/display: remove explicit CNL handling from intel_color.c Lucas De Marchi
2021-07-24 18:14 ` Matt Roper
2021-07-24 0:10 ` [Intel-gfx] [PATCH 06/30] drm/i915/display: remove explicit CNL handling from intel_combo_phy.c Lucas De Marchi
2021-07-24 18:17 ` Matt Roper
2021-07-24 0:10 ` [Intel-gfx] [PATCH 07/30] drm/i915/display: remove explicit CNL handling from intel_crtc.c Lucas De Marchi
2021-07-24 18:17 ` Matt Roper
2021-07-24 0:10 ` [Intel-gfx] [PATCH 08/30] drm/i915/display: remove explicit CNL handling from intel_ddi.c Lucas De Marchi
2021-07-26 11:00 ` Rodrigo Vivi
2021-07-24 0:10 ` [Intel-gfx] [PATCH 09/30] drm/i915/display: remove explicit CNL handling from intel_display_debugfs.c Lucas De Marchi
2021-07-26 11:06 ` Rodrigo Vivi
2021-07-24 0:10 ` [Intel-gfx] [PATCH 10/30] drm/i915/display: remove explicit CNL handling from intel_dmc.c Lucas De Marchi
2021-07-26 11:06 ` Rodrigo Vivi
2021-07-26 23:21 ` Matt Roper
2021-07-24 0:10 ` [Intel-gfx] [PATCH 11/30] drm/i915/display: remove explicit CNL handling from intel_dp.c Lucas De Marchi
2021-07-26 10:41 ` Rodrigo Vivi
2021-07-24 0:10 ` [Intel-gfx] [PATCH 12/30] drm/i915/display: remove explicit CNL handling from intel_dpll_mgr.c Lucas De Marchi
2021-07-26 10:35 ` Rodrigo Vivi
2021-07-24 0:10 ` [Intel-gfx] [PATCH 13/30] drm/i915/display: remove explicit CNL handling from intel_vdsc.c Lucas De Marchi
2021-07-26 11:05 ` Rodrigo Vivi
2021-07-24 0:10 ` [Intel-gfx] [PATCH 14/30] drm/i915/display: remove explicit CNL handling from skl_universal_plane.c Lucas De Marchi
2021-07-26 10:22 ` Rodrigo Vivi
2021-07-24 0:10 ` [Intel-gfx] [PATCH 15/30] drm/i915/display: remove explicit CNL handling from intel_display_power.c Lucas De Marchi
2021-07-26 10:28 ` Rodrigo Vivi
2021-07-24 0:11 ` [Intel-gfx] [PATCH 16/30] drm/i915/display: remove CNL ddi buf translation tables Lucas De Marchi
2021-07-26 10:56 ` Rodrigo Vivi
2021-07-24 0:11 ` [Intel-gfx] [PATCH 17/30] drm/i915/display: rename CNL references in skl_scaler.c Lucas De Marchi
2021-07-26 10:11 ` Rodrigo Vivi
2021-07-24 0:11 ` [Intel-gfx] [PATCH 18/30] drm/i915: remove explicit CNL handling from i915_irq.c Lucas De Marchi
2021-07-26 10:59 ` Rodrigo Vivi
2021-07-26 15:06 ` Lucas De Marchi
2021-07-24 0:11 ` [Intel-gfx] [PATCH 19/30] drm/i915: remove explicit CNL handling from intel_pm.c Lucas De Marchi
2021-07-26 11:08 ` Rodrigo Vivi
2021-07-24 0:11 ` [Intel-gfx] [PATCH 20/30] drm/i915: remove explicit CNL handling from intel_mocs.c Lucas De Marchi
2021-07-26 10:21 ` Rodrigo Vivi
2021-07-24 0:11 ` [Intel-gfx] [PATCH 21/30] drm/i915: remove explicit CNL handling from intel_pch.c Lucas De Marchi
2021-07-26 10:14 ` Rodrigo Vivi
2021-07-24 0:11 ` [Intel-gfx] [PATCH 22/30] drm/i915: remove explicit CNL handling from intel_wopcm.c Lucas De Marchi
2021-07-26 10:57 ` Rodrigo Vivi
2021-07-24 0:11 ` [Intel-gfx] [PATCH 23/30] drm/i915/gt: remove explicit CNL handling from intel_sseu.c Lucas De Marchi
2021-07-26 23:21 ` Matt Roper [this message]
2021-07-24 0:11 ` [Intel-gfx] [PATCH 24/30] drm/i915: rename CNL references in intel_dram.c Lucas De Marchi
2021-07-26 10:22 ` Rodrigo Vivi
2021-07-24 0:11 ` [Intel-gfx] [PATCH 25/30] drm/i915/gt: rename CNL references in intel_engine.h Lucas De Marchi
2021-07-26 10:38 ` Rodrigo Vivi
2021-07-24 0:11 ` [Intel-gfx] [PATCH 26/30] drm/i915: finish removal of CNL Lucas De Marchi
2021-07-26 10:21 ` Rodrigo Vivi
2021-07-24 0:11 ` [Intel-gfx] [PATCH 27/30] drm/i915: remove GRAPHICS_VER == 10 Lucas De Marchi
2021-07-26 10:08 ` Rodrigo Vivi
2021-07-24 0:11 ` [Intel-gfx] [PATCH 28/30] drm/i915: rename/remove CNL registers Lucas De Marchi
2021-07-26 10:06 ` Rodrigo Vivi
2021-07-24 0:11 ` [Intel-gfx] [PATCH 29/30] drm/i915: replace random CNL comments Lucas De Marchi
2021-07-26 10:09 ` Rodrigo Vivi
2021-07-24 0:11 ` [Intel-gfx] [PATCH 30/30] drm/i915: switch num_scalers/num_sprites to consider DISPLAY_VER Lucas De Marchi
2021-07-26 10:13 ` Rodrigo Vivi
2021-07-27 6:59 ` Lucas De Marchi
2021-07-24 0:40 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Remove CNL support Patchwork
2021-07-24 0:41 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2021-07-24 1:10 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2021-07-24 2:05 ` [Intel-gfx] [PATCH 00/30] " Jason Ekstrand
2021-07-24 12:37 ` [Intel-gfx] ✗ Fi.CI.IGT: failure for " Patchwork
2021-07-26 11:07 ` Rodrigo Vivi
2021-07-26 13:59 ` Lucas De Marchi
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