Re: [Intel-gfx] [PATCH] drm/i915/hdcp: Disable the QSES check for HDCP 1.4 over MST

From: Jani Nikula <jani.nikula@linux.intel.com>
To: Sean Paul <sean@poorly.run>,
	dri-devel@lists.freedesktop.org, intel-gfx@lists.freedesktop.org,
	Anshuman Gupta <anshuman.gupta@intel.com>
Cc: , David Airlie <airlied@linux.ie>, Sean Paul <seanpaul@chromium.org>
Subject: Re: [Intel-gfx] [PATCH] drm/i915/hdcp: Disable the QSES check for HDCP 1.4 over MST
Date: Tue, 12 Jan 2021 19:51:39 +0200	[thread overview]
Message-ID: <87czyat55g.fsf@intel.com> (raw)
In-Reply-To: <20210106223909.34476-1-sean@poorly.run>

Anshuman, please review.

BR,
Jani.

On Wed, 06 Jan 2021, Sean Paul <sean@poorly.run> wrote:
> From: Sean Paul <seanpaul@chromium.org>
>
> The HDCP 1.4 spec does not require the QUERY_STREAM_ENCRYPTION_STATUS
> check, it was always a nice-to-have. After deploying this across various
> devices, we've determined that some MST bridge chips do not properly
> support this call for HDCP 1.4 (namely Synaptics and Realtek).
>
> I had considered creating a quirk for this, but I think it's more
> prudent to just disable the check entirely since I don't have an idea
> how widespread support is.
>
> Signed-off-by: Sean Paul <seanpaul@chromium.org>
> ---
>  drivers/gpu/drm/i915/display/intel_dp_hdcp.c | 26 +-------------------
>  1 file changed, 1 insertion(+), 25 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_dp_hdcp.c b/drivers/gpu/drm/i915/display/intel_dp_hdcp.c
> index 03424d20e9f7..b6a9606bf09a 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp_hdcp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp_hdcp.c
> @@ -640,30 +640,6 @@ intel_dp_mst_hdcp_toggle_signalling(struct intel_digital_port *dig_port,
>  	return ret;
>  }
>  
> -static
> -bool intel_dp_mst_hdcp_check_link(struct intel_digital_port *dig_port,
> -				  struct intel_connector *connector)
> -{
> -	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
> -	struct intel_dp *intel_dp = &dig_port->dp;
> -	struct drm_dp_query_stream_enc_status_ack_reply reply;
> -	int ret;
> -
> -	if (!intel_dp_hdcp_check_link(dig_port, connector))
> -		return false;
> -
> -	ret = drm_dp_send_query_stream_enc_status(&intel_dp->mst_mgr,
> -						  connector->port, &reply);
> -	if (ret) {
> -		drm_dbg_kms(&i915->drm,
> -			    "[CONNECTOR:%d:%s] failed QSES ret=%d\n",
> -			    connector->base.base.id, connector->base.name, ret);
> -		return false;
> -	}
> -
> -	return reply.auth_completed && reply.encryption_enabled;
> -}
> -
>  static const struct intel_hdcp_shim intel_dp_mst_hdcp_shim = {
>  	.write_an_aksv = intel_dp_hdcp_write_an_aksv,
>  	.read_bksv = intel_dp_hdcp_read_bksv,
> @@ -674,7 +650,7 @@ static const struct intel_hdcp_shim intel_dp_mst_hdcp_shim = {
>  	.read_ksv_fifo = intel_dp_hdcp_read_ksv_fifo,
>  	.read_v_prime_part = intel_dp_hdcp_read_v_prime_part,
>  	.toggle_signalling = intel_dp_mst_hdcp_toggle_signalling,
> -	.check_link = intel_dp_mst_hdcp_check_link,
> +	.check_link = intel_dp_hdcp_check_link,
>  	.hdcp_capable = intel_dp_hdcp_capable,
>  
>  	.protocol = HDCP_PROTOCOL_DP,

-- 
Jani Nikula, Intel Open Source Graphics Center
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