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 messages from 2020-05-04 04:49:53 to 2020-05-05 13:35:57 UTC [more...]

[Intel-gfx] [PATCH] drm/i915: HDCP: retry link integrity check on failure
 2020-05-05 12:12 UTC  (8+ messages)
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for "
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✓ Fi.CI.IGT: "

[Intel-gfx] [PATCH v2 00/22] Introduce Rocket Lake
 2020-05-05 13:35 UTC  (27+ messages)
` [Intel-gfx] [PATCH v2 01/22] drm/i915/rkl: Add RKL platform info and PCI ids
` [Intel-gfx] [PATCH v2 02/22] x86/gpu: add RKL stolen memory support
` [Intel-gfx] [PATCH v2 03/22] drm/i915/rkl: Re-use TGL GuC/HuC firmware
` [Intel-gfx] [PATCH v2 04/22] drm/i915/rkl: Load DMC firmware for Rocket Lake
` [Intel-gfx] [PATCH v2 05/22] drm/i915/rkl: Add PCH support
` [Intel-gfx] [PATCH v2 06/22] drm/i915/rkl: Update memory bandwidth parameters
` [Intel-gfx] [PATCH v2 07/22] drm/i915/rkl: Limit number of universal planes to 5
` [Intel-gfx] [PATCH v2 08/22] drm/i915/rkl: Add power well support
` [Intel-gfx] [PATCH v2 09/22] drm/i915/rkl: Program BW_BUDDY0 registers instead of BW_BUDDY1/2
` [Intel-gfx] [PATCH v2 10/22] drm/i915/rkl: RKL only uses PHY_MISC for PHY's A and B
` [Intel-gfx] [PATCH v2 11/22] drm/i915/rkl: Handle new DPCLKA_CFGCR0 layout
` [Intel-gfx] [PATCH v2 12/22] drm/i915/rkl: Check proper SDEISR bits for TC1 and TC2 outputs
` [Intel-gfx] [PATCH v2 13/22] drm/i915/rkl: Setup ports/phys
` [Intel-gfx] [PATCH v2 14/22] drm/i915/rkl: provide port/phy mapping for vbt
` [Intel-gfx] [PATCH v2 15/22] drm/i915/rkl: Add DDC pin mapping
` [Intel-gfx] [PATCH v2 16/22] drm/i915/rkl: Don't try to access transcoder D
` [Intel-gfx] [PATCH v2 17/22] drm/i915/rkl: Don't try to read out DSI transcoders
` [Intel-gfx] [PATCH v2 18/22] drm/i915/rkl: Handle comp master/slave relationships for PHYs
` [Intel-gfx] [PATCH v2 19/22] drm/i915/rkl: Add DPLL4 support
` [Intel-gfx] [PATCH v2 20/22] drm/i915/rkl: Handle HTI
` [Intel-gfx] [PATCH v2 21/22] drm/i915/rkl: Disable PSR2
` [Intel-gfx] [PATCH v2 22/22] drm/i915/rkl: Add initial workarounds
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Introduce Rocket Lake (rev4)
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✗ Fi.CI.IGT: failure "

[Intel-gfx] [PATCH 1/2] drm/i915: Mark concurrent submissions with a weak-dependency
 2020-05-05 13:15 UTC  (2+ messages)
` [Intel-gfx] [PATCH 2/2] drm/i915: Ignore submit-fences on the same timeline

[Intel-gfx] [PATCH i-g-t] lib/i915: Reset all engine properties to defaults prior to the start of a test
 2020-05-05 12:13 UTC 

[Intel-gfx] [PATCH v2 0/9] Prefer drm_WARN* over WARN*
 2020-05-05 11:57 UTC  (13+ messages)
` [Intel-gfx] [PATCH v2 1/9] drm/i915/display/display_power: Prefer drm_WARN_ON over WARN_ON
` [Intel-gfx] [PATCH v2 2/9] drm/i915/display/dp: Prefer drm_WARN* over WARN*
` [Intel-gfx] [PATCH v2 3/9] drm/i915/display/sdvo: "
` [Intel-gfx] [PATCH v2 4/9] drm/i915/display/tc: Prefer drm_WARN_ON over WARN_ON
` [Intel-gfx] [PATCH v2 5/9] drm/i915/gem: Prefer drm_WARN* over WARN*
` [Intel-gfx] [PATCH v2 6/9] drm/i915/i915_drv: Prefer drm_WARN_ON over WARN_ON
` [Intel-gfx] [PATCH v2 7/9] drm/i915/pmu: "
` [Intel-gfx] [PATCH v2 8/9] drm/i915/pm: "
` [Intel-gfx] [PATCH v2 9/9] drm/i915/runtime_pm: Prefer drm_WARN* over WARN*
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Prefer drm_WARN* over WARN* (rev3)
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✓ Fi.CI.IGT: "

[Intel-gfx] [PATCH i-g-t] lib/i915: Split igt_require_gem() into i915/
 2020-05-05 11:38 UTC 

[Intel-gfx] [PATCH v27 0/6] SAGV support for Gen12+
 2020-05-05 11:04 UTC  (11+ messages)
` [Intel-gfx] [PATCH v27 1/6] drm/i915: Introduce skl_plane_wm_level accessor
` [Intel-gfx] [PATCH v27 2/6] drm/i915: Separate icl and skl SAGV checking
` [Intel-gfx] [PATCH v27 3/6] drm/i915: Add TGL+ SAGV support
` [Intel-gfx] [PATCH v27 4/6] drm/i915: Added required new PCode commands
` [Intel-gfx] [PATCH v27 5/6] drm/i915: Restrict qgv points which don't have enough bandwidth
` [Intel-gfx] [PATCH v27 6/6] drm/i915: Enable SAGV support for Gen12

[Intel-gfx] [CI] drm/i915/execlists: Record the active CCID from before reset
 2020-05-05 10:46 UTC  (2+ messages)
` [Intel-gfx] ✓ Fi.CI.BAT: success for "

[Intel-gfx] [PATCH i-g-t] i915/gem_ctx_exec: Exploit resource contention to verify execbuf independence
 2020-05-05 10:27 UTC 

[Intel-gfx] [CI] drm/i915/gt: Stop holding onto the pinned_default_state
 2020-05-05  9:25 UTC  (6+ messages)
` [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/gt: Stop holding onto the pinned_default_state (rev2)
` [Intel-gfx] ✓ Fi.CI.IGT: "

[Intel-gfx] [PATCH] drm/i915/tgl+: Fix interrupt handling for DP AUX transactions
 2020-05-05  9:15 UTC  (8+ messages)
` [Intel-gfx] ✓ Fi.CI.BAT: success for "
` [Intel-gfx] ✗ Fi.CI.IGT: failure "
` [Intel-gfx] ✓ Fi.CI.IGT: success "

[Intel-gfx] [PATCH] drm: Replace drm_modeset_lock/unlock_all with DRM_MODESET_LOCK_ALL_* helpers
 2020-05-05  8:51 UTC  (8+ messages)

[Intel-gfx] [PATCH v26 0/9] SAGV support for Gen12+
 2020-05-05  8:51 UTC  (6+ messages)
` [Intel-gfx] [PATCH v26 6/9] drm/i915: Added required new PCode commands
` [Intel-gfx] ✗ Fi.CI.BUILD: failure for SAGV support for Gen12+ (rev34)

[Intel-gfx] [PATCH 1/9] Revert "drm/i915/tgl: Include ro parts of l3 to invalidate"
 2020-05-05  8:45 UTC  (4+ messages)
` [Intel-gfx] [PATCH 4/9] drm/i915/gen12: Flush L3

[Intel-gfx] [PATCH v3 07/25] drm: i915: fix common struct sg_table related issues
 2020-05-05  8:45 UTC 

[Intel-gfx] [PATCH v2 0/3] Steer multicast register workaround verification
 2020-05-05  8:14 UTC  (5+ messages)
` [Intel-gfx] [PATCH v2 2/3] drm/i915: Setup MCR steering for RCS engine workarounds

[Intel-gfx] [CI] drm/i915/gt: Small tidy of gen8+ breadcrumb emission
 2020-05-05  7:59 UTC  (4+ messages)
` [Intel-gfx] ✓ Fi.CI.BAT: success for "
` [Intel-gfx] ✓ Fi.CI.IGT: "

[Intel-gfx] [PATCH] drm/i915/tgl: Put HDC flush pipe_control bit in the right dword
 2020-05-05  7:27 UTC  (6+ messages)
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for "
` [Intel-gfx] ✓ Fi.CI.BAT: success "

[Intel-gfx] [PATCH v26 8/9] drm/i915: Restrict qgv points which don't have enough bandwidth
 2020-05-05  7:23 UTC  (2+ messages)

[Intel-gfx] [CI] drm/i915/gem: Implement legacy MI_STORE_DATA_IMM
 2020-05-05  3:07 UTC  (4+ messages)
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/gem: Implement legacy MI_STORE_DATA_IMM (rev2)
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✓ Fi.CI.IGT: "

[Intel-gfx] [PATCH 01/22] drm/i915: Allow some leniency in PCU reads
 2020-05-05  1:31 UTC  (30+ messages)
` [Intel-gfx] [PATCH 02/22] drm/i915/gem: Specify address type for chained reloc batches
` [Intel-gfx] [PATCH 03/22] drm/i915/gem: Implement legacy MI_STORE_DATA_IMM
  ` [Intel-gfx] [PATCH v2] "
` [Intel-gfx] [PATCH 05/22] drm/i915: Mark concurrent submissions with a weak-dependency
` [Intel-gfx] [PATCH 06/22] drm/i915/selftests: Repeat the rps clock frequency measurement
` [Intel-gfx] [PATCH 08/22] dma-buf: Proxy fence, an unsignaled fence placeholder
` [Intel-gfx] [PATCH 09/22] drm/syncobj: Allow use of dma-fence-proxy
` [Intel-gfx] [PATCH 12/22] drm/i915/gt: Declare when we enabled timeslicing
` [Intel-gfx] [PATCH 13/22] drm/i915: Replace the hardcoded I915_FENCE_TIMEOUT
` [Intel-gfx] [PATCH 14/22] drm/i915: Drop I915_RESET_TIMEOUT and friends
` [Intel-gfx] [PATCH 17/22] drm/i915/gem: Assign context id for async work
` [Intel-gfx] [PATCH 19/22] drm/i915/gem: Separate the ww_mutex walker into its own list
` [Intel-gfx] [PATCH 21/22] drm/i915/gem: Bind the fence async for execbuf
` [Intel-gfx] [PATCH 22/22] drm/i915/gem: Lazily acquire the device wakeref for freeing objects
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [01/22] drm/i915: Allow some leniency in PCU reads
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [01/22] drm/i915: Allow some leniency in PCU reads (rev2)
` [Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [01/22] drm/i915: Allow some leniency in PCU reads
` [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [01/22] drm/i915: Allow some leniency in PCU reads (rev2)
` [Intel-gfx] ✓ Fi.CI.IGT: "

[Intel-gfx] [CI] drm/i915/gem: Specify address type for chained reloc batches
 2020-05-05  0:46 UTC  (3+ messages)
` [Intel-gfx] ✓ Fi.CI.BAT: success for "
` [Intel-gfx] ✓ Fi.CI.IGT: "

[Intel-gfx] [PATCH 01/24] perf/core: Only copy-to-user after completely unlocking all locks, v3
 2020-05-04 22:20 UTC  (2+ messages)
` [Intel-gfx] ✗ Fi.CI.IGT: failure for series starting with [01/24] "

[Intel-gfx] [PATCH 00/23] Introduce Rocket Lake
 2020-05-04 22:08 UTC  (6+ messages)
` [Intel-gfx] [PATCH 11/23] drm/i915/rkl: Add cdclk support
` [Intel-gfx] ✗ Fi.CI.BUILD: failure for Introduce Rocket Lake (rev3)

[Intel-gfx] [PATCH] drm/i915: Show per-engine default property values in sysfs
 2020-05-04 21:42 UTC  (2+ messages)

[Intel-gfx] [PATCH v12 0/4] drm/i915/perf: Add support for multi context perf queries
 2020-05-04 20:51 UTC  (10+ messages)
` [Intel-gfx] [PATCH v12 1/4] drm/i915/perf: break OA config buffer object in 2
` [Intel-gfx] [PATCH v12 2/4] drm/i915/perf: stop using the kernel context
` [Intel-gfx] [PATCH v12 3/4] drm/i915/perf: prepare driver to receive multiple ctx handles
` [Intel-gfx] [PATCH v12 4/4] drm/i915/perf: enable filtering on multiple contexts
` [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/perf: Add support for multi context perf queries (rev6)
` [Intel-gfx] ✓ Fi.CI.IGT: "

[Intel-gfx] [PATCH 12/23] drm/i915/rkl: Handle new DPCLKA_CFGCR0 layout
 2020-05-04 20:34 UTC  (2+ messages)
` [Intel-gfx] [PATCH v2] "

[Intel-gfx] [PATCH i-g-t] i915/gem_ctx_exec: Exploit resource contention to verify execbuf independence
 2020-05-04 19:31 UTC 

[Intel-gfx] [PATCH] drm/i915/display: Fix the encoder type check
 2020-05-04 17:46 UTC  (3+ messages)
` [Intel-gfx] ✓ Fi.CI.BAT: success for "
` [Intel-gfx] ✓ Fi.CI.IGT: "

[Intel-gfx] [PATCH] drm/i915: Avoid using simd from interrupt context
 2020-05-04 13:06 UTC  (3+ messages)
` [Intel-gfx] ✓ Fi.CI.IGT: success for "

[Intel-gfx] [PATCH] drm/i915/gem: Fix inconsistent IS_ERR and PTR_ERR
 2020-05-04 16:58 UTC 

[Intel-gfx] [PATCH] drm/i915: check to see if SIMD registers are available before using SIMD
 2020-05-04 16:15 UTC  (7+ messages)

[Intel-gfx] [PATCH hmm v2 1/5] mm/hmm: make CONFIG_DEVICE_PRIVATE into a select
 2020-05-02  5:47 UTC 

[Intel-gfx] [PATCH][next] drm/i915/gem: Fix inconsistent IS_ERR and PTR_ERR
 2020-05-04 16:54 UTC  (2+ messages)
` [Intel-gfx] ✗ Fi.CI.BAT: failure for "

[Intel-gfx] [PATCH] drm/i915: Don't enable WaIncreaseLatencyIPCEnabled when IPC is disabled
 2020-05-04 16:12 UTC  (5+ messages)
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for "
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✗ Fi.CI.IGT: failure "

[Intel-gfx] Wait-for-submit on future syncobj
 2020-05-04 15:08 UTC  (10+ messages)
` [Intel-gfx] [PATCH 1/6] drm/i915: Mark concurrent submissions with a weak-dependency
` [Intel-gfx] [PATCH 2/6] dma-buf: Proxy fence, an unsignaled fence placeholder
` [Intel-gfx] [PATCH 3/6] drm/syncobj: Allow use of dma-fence-proxy
` [Intel-gfx] [PATCH 4/6] drm/i915/gem: Teach execbuf how to wait on future syncobj
` [Intel-gfx] [PATCH 5/6] drm/i915/gem: Allow combining submit-fences with syncobj
` [Intel-gfx] [PATCH 6/6] drm/i915/gt: Declare when we enabled timeslicing
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/6] drm/i915: Mark concurrent submissions with a weak-dependency
` [Intel-gfx] ✗ Fi.CI.BAT: failure "

[Intel-gfx] [PATCH 00/12] drm/i915: FBC fixes
 2020-05-04 15:02 UTC  (4+ messages)
` [Intel-gfx] [PATCH 04/12] drm/i915/fbc: Fix nuke for pre-snb platforms

[Intel-gfx] [PATCH 02/12] drm/i915/fbc: Use the correct plane stride
 2020-05-04 14:33 UTC  (4+ messages)
` [Intel-gfx] [PATCH v2 "

[Intel-gfx] [PATCH] drm/i915/display: Warn if the FBC is still writing to stolen on removal
 2020-05-04 14:19 UTC  (4+ messages)
` [Intel-gfx] ✓ Fi.CI.IGT: success for "

[Intel-gfx] [PATCH hmm v2 5/5] mm/hmm: remove the customizable pfn format from hmm_range_fault
 2020-05-04 13:14 UTC 

[Intel-gfx] [PATCH v2 06/21] drm: i915: fix sg_table nents vs. orig_nents misuse for dmabuf objects
 2020-05-04 12:53 UTC 

[Intel-gfx] [PATCH v11 0/4] drm/i915/perf: Add support for multi context perf queries
 2020-05-04 11:22 UTC  (9+ messages)
` [Intel-gfx] [PATCH v11 1/4] drm/i915/perf: break OA config buffer object in 2
` [Intel-gfx] [PATCH v11 2/4] drm/i915/perf: stop using the kernel context
` [Intel-gfx] [PATCH v11 3/4] drm/i915/perf: prepare driver to receive multiple ctx handles
` [Intel-gfx] [PATCH v11 4/4] drm/i915/perf: enable filtering on multiple contexts
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/perf: Add support for multi context perf queries (rev5)
` [Intel-gfx] ✓ Fi.CI.BAT: success "

[Intel-gfx] [PATCH] drm/i915/gem: Lazily acquire the device wakeref for freeing objects
 2020-05-04 10:40 UTC  (3+ messages)
` [Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/gem: Lazily acquire the device wakeref for freeing objects (rev2)

[Intel-gfx] [PATCH i-g-t] i915/gem_ctx_exec: Exploit resource contention to verify execbuf independence
 2020-05-04  9:52 UTC 


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