messages from 2020-11-03 14:54:28 to 2020-11-05 17:29:13 UTC [more...]
[Intel-gfx] [PULL] drm-intel-fixes
2020-11-05 17:30 UTC
[Intel-gfx] [PATCH v4 00/16] HDCP 2.2 and HDCP 1.4 Gen12 DP MST support
2020-11-05 16:47 UTC (27+ messages)
` [Intel-gfx] [PATCH v4 01/16] drm/i915/hdcp: Update CP property in update_pipe
` [Intel-gfx] [PATCH v4 02/16] drm/i915/hdcp: Get conn while content_type changed
` [Intel-gfx] [PATCH v4 04/16] drm/i915/hdcp: DP MST transcoder for link and stream
` [Intel-gfx] [PATCH v4 05/16] drm/i915/hdcp: Move HDCP enc status timeout to header
` [Intel-gfx] [PATCH v4 06/16] drm/i915/hdcp: HDCP stream encryption support
` [Intel-gfx] [PATCH v4 07/16] drm/i915/hdcp: Enable Gen12 HDCP 1.4 DP MST support
` [Intel-gfx] [PATCH v4 08/16] drm/i915/hdcp: Pass dig_port to intel_hdcp_init
` [Intel-gfx] [PATCH v4 10/16] misc/mei/hdcp: Fix AUTH_STREAM_REQ cmd buffer len
` [Intel-gfx] [PATCH v4 11/16] drm/hdcp: Max MST content streams
` [Intel-gfx] [PATCH v4 12/16] drm/i915/hdcp: MST streams support in hdcp port_data
` [Intel-gfx] [PATCH v4 13/16] drm/i915/hdcp: Pass connector to check_2_2_link
` [Intel-gfx] [PATCH v4 14/16] drm/i915/hdcp: Add HDCP 2.2 stream register
[Intel-gfx] [PATCH V3] drm/i915/ehl: Implement W/A 22010492432
2020-11-05 16:30 UTC (5+ messages)
` [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/ehl: Implement W/A 22010492432 (rev3)
` [Intel-gfx] ✗ Fi.CI.IGT: failure "
[Intel-gfx] [PATCH 0/2] Re-enable FBC on TGL
2020-11-05 16:27 UTC (9+ messages)
` [Intel-gfx] [PATCH 1/2] drm/i915/display/tgl: Disable FBC with PSR2
` [Intel-gfx] [PATCH 2/2] Revert "drm/i915/display/fbc: Disable fbc by default on TGL"
` [Intel-gfx] ✓ Fi.CI.BAT: success for Re-enable FBC on TGL
` [Intel-gfx] ✗ Fi.CI.IGT: failure "
[Intel-gfx] [PATCH v5 6/6] drm/i915/dp: Allow big joiner modes in intel_dp_mode_valid(), v3
2020-11-05 16:27 UTC (4+ messages)
` [Intel-gfx] [PATCH v6 "
[Intel-gfx] [PATCH 01/22] drm/i915/gem: Allow backends to override pread implementation
2020-11-05 16:19 UTC (29+ messages)
` [Intel-gfx] [PATCH 02/22] drm/i915/gem: Pull phys pread/pwrite implementations to the backend
` [Intel-gfx] [PATCH 03/22] drm/i915/gt: Limit VFE threads based on GT
` [Intel-gfx] [PATCH 04/22] drm/i915/gt: Ignore dt==0 for reporting underflows
` [Intel-gfx] [PATCH 05/22] drm/i915/gt: Defer enabling the breadcrumb interrupt to after submission
` [Intel-gfx] [PATCH 06/22] drm/i915/gt: Track signaled breadcrumbs outside of the breadcrumb spinlock
` [Intel-gfx] [PATCH 07/22] drm/i915/gt: Don't cancel the interrupt shadow too early
` [Intel-gfx] [PATCH 08/22] drm/i915/gt: Free stale request on destroying the virtual engine
` [Intel-gfx] [PATCH 09/22] drm/i915/gt: Protect context lifetime with RCU
` [Intel-gfx] [PATCH 10/22] drm/i915/gt: Split the breadcrumb spinlock between global and contexts
` [Intel-gfx] [PATCH 11/22] drm/i915/gt: Move the breadcrumb to the signaler if completed upon cancel
` [Intel-gfx] [PATCH 12/22] drm/i915/gt: Decouple completed requests on unwind
` [Intel-gfx] [PATCH 13/22] drm/i915/gt: Check for a completed last request once
` [Intel-gfx] [PATCH 14/22] drm/i915/gt: Replace direct submit with direct call to tasklet
` [Intel-gfx] [PATCH 15/22] drm/i915/gt: ce->inflight updates are now serialised
` [Intel-gfx] [PATCH 16/22] drm/i915/gt: Use virtual_engine during execlists_dequeue
` [Intel-gfx] [PATCH 17/22] drm/i915/gt: Decouple inflight virtual engines
` [Intel-gfx] [PATCH 18/22] drm/i915/gt: Defer schedule_out until after the next dequeue
` [Intel-gfx] [PATCH 19/22] drm/i915/gt: Remove virtual breadcrumb before transfer
` [Intel-gfx] [PATCH 20/22] drm/i915/gt: Shrink the critical section for irq signaling
` [Intel-gfx] [PATCH 21/22] drm/i915/gt: Resubmit the virtual engine on schedule-out
` [Intel-gfx] [PATCH 22/22] drm/i915/gt: Simplify virtual engine handling for execlists_hold()
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [01/22] drm/i915/gem: Allow backends to override pread implementation
` [Intel-gfx] ✓ Fi.CI.BAT: success "
[Intel-gfx] [PATCH v5 1/6] drm/i915/dp: Some reshuffling in mode_valid as prep for bigjoiner modes
2020-11-05 16:16 UTC (13+ messages)
` [Intel-gfx] [PATCH v5 2/6] drm/i915: Move encoder->get_config to a new function
` [Intel-gfx] [PATCH v5 4/6] drm/i915: Pass intel_atomic_state instead of drm_atomic_state
` [Intel-gfx] [PATCH v5 5/6] drm/i915/dp: Prep for bigjoiner atomic check
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [v5,1/6] drm/i915/dp: Some reshuffling in mode_valid as prep for bigjoiner modes (rev3)
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✓ Fi.CI.IGT: "
[Intel-gfx] [PATCH v5 3/6] drm/i915: Add hw.pipe_mode to allow bigjoiner pipe/transcoder split
2020-11-05 16:15 UTC (5+ messages)
` [Intel-gfx] [PATCH v6 "
[Intel-gfx] [PATCH] drm/i915/gem: Drop free_work for GEM contexts
2020-11-05 16:11 UTC (2+ messages)
` [Intel-gfx] ✗ Fi.CI.BAT: failure for "
[Intel-gfx] [RFC 1/2] drm/i915: Improve record of hung engines in error state
2020-11-05 15:51 UTC (12+ messages)
` [Intel-gfx] [RFC 2/2] drm/i915: Use ABI engine class in error state ecode
` [Intel-gfx] [RFC v2 "
` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [RFC,1/2] drm/i915: Improve record of hung engines in error state
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✓ Fi.CI.IGT: "
` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [RFC,1/2] drm/i915: Improve record of hung engines in error state (rev2)
` [Intel-gfx] ✓ Fi.CI.BAT: success "
[Intel-gfx] [CI 1/2] drm/i915/gem: Allow backends to override pread implementation
2020-11-05 15:49 UTC (2+ messages)
` [Intel-gfx] [CI 2/2] drm/i915/gem: Pull phys pread/pwrite implementations to the backend
[Intel-gfx] [PATCH] drm/i915/display: Use initial_fastset_check() to compute and apply the initial PSR state
2020-11-05 13:46 UTC (4+ messages)
` [Intel-gfx] ✓ Fi.CI.IGT: success for "
[Intel-gfx] [PATCH 0/8] drm/i915: Remainder of dbuf state stuff
2020-11-05 11:22 UTC (7+ messages)
` [Intel-gfx] [PATCH 1/8] drm/i915: Extract intel_crtc_ddb_weight()
` [Intel-gfx] [PATCH 3/8] drm/i915: Introduce intel_dbuf_slice_size()
` [Intel-gfx] [PATCH 4/8] drm/i915: Introduce skl_ddb_entry_for_slices()
[Intel-gfx] [PULL] drm-misc-next
2020-11-05 10:16 UTC
[Intel-gfx] [PULL] drm-misc-fixes
2020-11-05 10:13 UTC
[Intel-gfx] [PATCH 1/3] drm/i915: Guard debugfs against invalid access without display
2020-11-05 8:02 UTC (5+ messages)
` [Intel-gfx] [PATCH 3/3] drm/i915: remove some debug-only registers from MCHBAR
[Intel-gfx] [PATCH v4 00/61] drm/i915: Remove obj->mm.lock!
2020-11-05 7:10 UTC (9+ messages)
` [Intel-gfx] [PATCH v4 20/61] drm/i915: Rework clflush to work correctly without obj->mm.lock
` [Intel-gfx] [PATCH v4 31/61] drm/i915: Prepare for obj->mm.lock removal
[Intel-gfx] [PATCH] drm/i915: Tweaked Wa_14010685332 for PCHs used on gen11 platforms
2020-11-05 5:17 UTC (3+ messages)
[Intel-gfx] [PATCH i-g-t 1/2] i915/gem_exec_whisper: Reopen existing device
2020-11-05 1:51 UTC (4+ messages)
` [Intel-gfx] [PATCH i-g-t 2/2] i915/gem_ctx_thrash: Reopen the same device
[Intel-gfx] linux-next: manual merge of the drm-msm tree with the drm-misc tree
2020-11-05 0:58 UTC
[Intel-gfx] linux-next: manual merge of the drm-misc tree with the amdgpu tree
2020-11-05 0:39 UTC (2+ messages)
[Intel-gfx] [PATCH 1/2] drm/i915/gem: Allow backends to override pread implementation
2020-11-05 0:09 UTC (5+ messages)
` [Intel-gfx] [PATCH 2/2] drm/i915/gem: Pull phys pread/pwrite implementations to the backend
` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [1/2] drm/i915/gem: Allow backends to override pread implementation
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✗ Fi.CI.IGT: failure "
[Intel-gfx] [PATCH i-g-t] i915/gem_exec_parallel: Reopen the existing device
2020-11-04 23:53 UTC (2+ messages)
[Intel-gfx] [PATCH] drm/i915/perf: replace idr_init() by idr_init_base()
2020-11-04 23:15 UTC (3+ messages)
` [Intel-gfx] ✓ Fi.CI.BAT: success for "
` [Intel-gfx] ✗ Fi.CI.IGT: failure "
[Intel-gfx] [PATCH] drm/i915: Prevent GGTT access if not available for pread/pwrite
2020-11-04 22:18 UTC (3+ messages)
` [Intel-gfx] ✓ Fi.CI.BAT: success for "
` [Intel-gfx] ✗ Fi.CI.IGT: failure "
[Intel-gfx] [PATCH i-g-t] i915/gem_userptr_blits: Explicitly check userptr termination
2020-11-04 22:12 UTC
[Intel-gfx] [PATCH] drm/i915/gvt: replace idr_init() by idr_init_base()
2020-11-04 18:25 UTC (3+ messages)
` [Intel-gfx] ✓ Fi.CI.BAT: success for "
` [Intel-gfx] ✗ Fi.CI.IGT: failure "
[Intel-gfx] [PATCH i-g-t] gem_wsim: Use CTX_TIMESTAMP for timed spinners
2020-11-04 17:09 UTC (2+ messages)
` [Intel-gfx] [PATCH i-g-t v2] "
[Intel-gfx] [PATCH v3 1/2] drm/i915/display: Support PSR Multiple Transcoders
2020-11-04 16:37 UTC (8+ messages)
` [Intel-gfx] [PATCH v3 2/2] drm/i915/display: Support Multiple Transcoders' PSR status on debugfs
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [v3,1/2] drm/i915/display: Support PSR Multiple Transcoders
` [Intel-gfx] ✗ Fi.CI.SPARSE: "
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✓ Fi.CI.IGT: "
[Intel-gfx] [RFC 1/2] drm/i915: Improve record of hung engines in error state
2020-11-04 15:37 UTC (9+ messages)
` [Intel-gfx] [RFC 2/2] drm/i915: Use user engine names in error state ecode
` [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [RFC,1/2] drm/i915: Improve record of hung engines in error state
` [Intel-gfx] ✗ Fi.CI.IGT: failure "
[Intel-gfx] [PATCH] drm/i915/tgl: Fix typo during output setup
2020-11-04 14:55 UTC (5+ messages)
` [Intel-gfx] ✓ Fi.CI.BAT: success for "
` [Intel-gfx] ✗ Fi.CI.IGT: failure "
[Intel-gfx] [PATCH 00/18] Introduce Alderlake-S
2020-11-04 14:07 UTC (4+ messages)
` [Intel-gfx] [PATCH 13/18] drm/i915/adl_s: Add display, gt, ctx and ADL-S whitelist WA
[Intel-gfx] [CI 1/3] drm/i915/gt: Pull intel_gt_init_hw() into intel_gt_resume()
2020-11-04 10:11 UTC (4+ messages)
` [Intel-gfx] [CI 3/3] drm/i915/gt: Move pm debug files into a gt aware debugfs
[Intel-gfx] [v9 00/12] Enable HDR on MCA LSPCON based Gen9 devices
2020-11-04 9:40 UTC (13+ messages)
` [Intel-gfx] [v9 08/12] drm/i915/display: Implement infoframes readback for LSPCON
` [Intel-gfx] [v9 09/12] drm/i915/display: Implement DRM infoframe read "
` [Intel-gfx] [v9 10/12] drm/i915/lspcon: Create separate infoframe_enabled helper
` [Intel-gfx] [v9 11/12] drm/i915/lspcon: Do not send DRM infoframes to non-HDMI sinks
` [Intel-gfx] [v9 12/12] drm/i915/display: [NOT FOR MERGE] Reduce blanking to support 4k60@10bpp for LSPCON
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Enable HDR on MCA LSPCON based Gen9 devices (rev9)
` [Intel-gfx] ✗ Fi.CI.SPARSE: "
` [Intel-gfx] ✗ Fi.CI.BAT: failure "
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Enable HDR on MCA LSPCON based Gen9 devices (rev10)
` [Intel-gfx] ✗ Fi.CI.SPARSE: "
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✗ Fi.CI.IGT: failure "
[Intel-gfx] [PATCH 1/5] drm/radeon: Stop changing the drm_driver struct
2020-11-04 9:31 UTC (7+ messages)
` [Intel-gfx] [PATCH 3/5] drm/amdgpu: Paper over the drm_driver mangling for virt
[Intel-gfx] [v9 03/12] drm/i915/display: Attach HDR property for capable Gen9 devices
2020-11-04 7:30 UTC (2+ messages)
` [Intel-gfx] [v10 "
[Intel-gfx] [PATCH] drm/i915/gvt: Remove incorrect kerneldoc marking
2020-11-04 4:35 UTC (3+ messages)
` [Intel-gfx] ✗ Fi.CI.BAT: failure for "
[Intel-gfx] [PATCH v2 1/2] drm/i915/display: Support PSR Multiple Transcoders
2020-11-04 2:04 UTC (6+ messages)
` [Intel-gfx] [PATCH v2 2/2] drm/i915/display: Support Multiple Transcoders' PSR status on debugfs
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [v2,1/2] drm/i915/display: Support PSR Multiple Transcoders
` [Intel-gfx] ✗ Fi.CI.SPARSE: "
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✗ Fi.CI.IGT: failure "
[Intel-gfx] [PATCH 1/3] drm/i915: Pass intel_atomic_state to skl_build_pipe_wm()
2020-11-04 1:13 UTC (6+ messages)
` [Intel-gfx] [PATCH 2/3] drm/i915: Nuke intel_atomic_crtc_state_for_each_plane_state() from skl+ wm code
` [Intel-gfx] [PATCH 3/3] drm/i915: Pimp the watermark documentation a bit
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/3] drm/i915: Pass intel_atomic_state to skl_build_pipe_wm()
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✓ Fi.CI.IGT: "
[Intel-gfx] [PATCH 1/3] drm/i915/dg1: map/unmap pll clocks
2020-11-04 1:02 UTC (4+ messages)
[Intel-gfx] [PATCH] drm/i915/ehl: Remove invalid PCI ID
2020-11-04 0:52 UTC (3+ messages)
[Intel-gfx] linux-next: build failure after merge of the drm-intel-fixes tree
2020-11-04 0:25 UTC (2+ messages)
[Intel-gfx] [PATCH] drm/i915: Include fb modidier in state dumps
2020-11-03 22:43 UTC (5+ messages)
` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for "
` [Intel-gfx] ✓ Fi.CI.BAT: success "
` [Intel-gfx] ✗ Fi.CI.IGT: failure "
[Intel-gfx] [PATCH] drm/i915/tgl, rkl, dg1: Apply WA_1406941453 to TGL, RKL and DG1
2020-11-03 21:41 UTC (2+ messages)
[Intel-gfx] [PATCH V2] drm/i915/ehl: Implement W/A 22010492432
2020-11-03 20:57 UTC (5+ messages)
` [Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/ehl: Implement W/A 22010492432 (rev2)
[Intel-gfx] [patch V3 00/37] mm/highmem: Preemptible variant of kmap_atomic & friends
2020-11-03 19:00 UTC (4+ messages)
` [Intel-gfx] [patch V3 22/37] highmem: High implementation details and document API
[Intel-gfx] [PATCH v2] vfio/pci: Refine Intel IGD OpRegion support
2020-11-03 18:21 UTC (3+ messages)
` [Intel-gfx] [PATCH v3] vfio/pci: Bypass IGD init in case of -ENODEV
page: next (older) | prev (newer) | latest
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).