From mboxrd@z Thu Jan 1 00:00:00 1970 From: Rodrigo Vivi Subject: Re: [PATCH 2/2] drm/i915: kill cargo-culted locking from power well code Date: Wed, 30 Jan 2013 15:40:15 -0200 Message-ID: References: <1359557997-20308-1-git-send-email-daniel.vetter@ffwll.ch> <1359557997-20308-2-git-send-email-daniel.vetter@ffwll.ch> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from mail-ve0-f180.google.com (mail-ve0-f180.google.com [209.85.128.180]) by gabe.freedesktop.org (Postfix) with ESMTP id 29D7DE5D18 for ; Wed, 30 Jan 2013 09:40:16 -0800 (PST) Received: by mail-ve0-f180.google.com with SMTP id jx10so1316058veb.11 for ; Wed, 30 Jan 2013 09:40:15 -0800 (PST) In-Reply-To: <1359557997-20308-2-git-send-email-daniel.vetter@ffwll.ch> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org To: Daniel Vetter Cc: Intel Graphics Development , Paulo Zanoni List-Id: intel-gfx@lists.freedesktop.org Reviewed-by: Rodrigo Vivi On Wed, Jan 30, 2013 at 12:59 PM, Daniel Vetter wrote: > We may not concurrently change the power wells code. Which > is already guaranteed since modesets aren't concurrent. That > leaves races against setup/teardown/suspend/resume, and for > those we already (try) rather hard not to hit concurrent > modesets. > > No debug WARN_ON added since that would require us to grab the > modeset locks in init/suspend code. Which is again just cargo > culting since just grabbing the locks in those paths isn't good > enough, we need the right order of operations, too. > > Cc: Paulo Zanoni > Signed-off-by: Daniel Vetter > --- > drivers/gpu/drm/i915/intel_pm.c | 4 ---- > 1 file changed, 4 deletions(-) > > diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c > index 703219c..f024e7d 100644 > --- a/drivers/gpu/drm/i915/intel_pm.c > +++ b/drivers/gpu/drm/i915/intel_pm.c > @@ -4091,8 +4091,6 @@ void intel_init_power_well(struct drm_device *dev) > if (!IS_HASWELL(dev)) > return; > > - mutex_lock(&dev->struct_mutex); > - > /* For now, we need the power well to be always enabled. */ > intel_set_power_well(dev, true); > > @@ -4100,8 +4098,6 @@ void intel_init_power_well(struct drm_device *dev) > * the driver is in charge now. */ > if (I915_READ(HSW_PWR_WELL_BIOS) & HSW_PWR_WELL_ENABLE) > I915_WRITE(HSW_PWR_WELL_BIOS, 0); > - > - mutex_unlock(&dev->struct_mutex); > } > > /* Set up chip specific power management-related functions */ > -- > 1.7.10.4 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > http://lists.freedesktop.org/mailman/listinfo/intel-gfx -- Rodrigo Vivi Blog: http://blog.vivi.eng.br