Re: [Intel-gfx] [PATCH 00/13] Handle BPC for HDMI2.1 PCON without DSC1.2 sink and other fixes

["Ville Syrjälä" <ville.syrjala@linux.intel.com>]

On Fri, Mar 31, 2023 at 03:46:00PM +0530, Ankit Nautiyal wrote:
> This series fixes issues faced when an HDMI2.1 sink that does not
> support DSC is connected via HDMI2.1PCON. It also includes other minor
> HDMI2.1 PCON fixes/refactoring.
> 
> Patch 1-2 Have minor fixes/cleanups.
> Patch 3-6 Pull the decision making to use DFP conversion capabilities
> for every mode during compute config, instead of having that decision
> during DP initializing phase.
> Patch 7-8 Calculate the max BPC that can be sufficient with either
> RGB or YCbcr420 format for the maximum FRL rate supported.
> 
> Rev2: Split the refactoring of DFP RG->YCBCR conversion into smaller
> patches, as suggested by Jani N.
> Also dropped the unnecessary helper for DSC1.2 support for HDMI2.1 DFP.
> 
> Rev3: As suggested by Ville, added new member sink_format to store the
> final format that the sink will be using, which might be different
> than the output format, and thus might need color/format conversion
> performed by the PCON.
> 
> Rev4: Fix typo in switch case as, reported by kernel test bot.
> 
> Rev5: Corrected order of setting sink_format and output_format. (Ville)
> Avoided the flag ycbcr420_output and used the sink_format to facilitate
> 4:2:2 support at a later stage. (Ville)
> 
> Rev6: Added missing changes for sdvo. (Ville)
> Added check for scaler and DSC constraints with YCbCr420.
> 
> Rev7: Split change to add scaler constraint in separate patch, and rebased.
> 
> Rev8: Rebased. Fixed check for mode rate with dsc in modevalid.
> Fixed scaler constraint as per display version.
> 
> Rev9: Rebased.
> 
> Rev10: Addressed review comments from Ville.
> Dropped patch to check for mode rate with dsc during modevalid, as the
> compressed bpp is already selected with bandwidth considerations.
> 
> Rev11: Fixed the policy to use output format as RGB first if possible,
> followed by YCbCr444, atlast YCbCr420. Also removed the scaler-constraints
> with YCbCr420, as these are handled in scaler code. (Ville)
> 
> Rev12: Added a patch for configuring PCON to convert output_format to
> YCBCR444. Added patch to have consistent naming for link bpp and
> compressed bpp. 
> 
> Ankit Nautiyal (13):
>   drm/i915/display: Add new member to configure PCON color conversion
>   drm/i915/display: Add new member in intel_dp to store ycbcr420
>     passthrough cap
>   drm/i915/dp: Replace intel_dp.dfp members with the new crtc_state
>     sink_format
>   drm/i915/dp: Configure PCON for conversion of output_format to
>     YCbCr444
>   drm/i915/display: Use sink_format instead of ycbcr420_output flag
>   drm/i915/dp: Add helper to get sink_format
>   drm/i915/dp: Rearrange check for illegal mode and comments in
>     mode_valid

Apart from a few minor nits that set looks pretty much ready
to go in. Maybe rebase and submit just those so we can push them?

The rest might still need some tweaking, and I probably need 
to refresh mymemory on the FRL stuff before I look at those.

>   drm/i915/dp: Consider output_format while computing dsc bpp
>   drm/i915/dp_mst: Use output_format to get the final link bpp
>   drm/i915/dp: Handle BPP where HDMI2.1 DFP doesn't support DSC
>   drm/i915/dp: Fix FRL BW check for HDMI2.1 DFP
>   drm/i915/dp: Add a wrapper to check frl/tmds downstream constraints
>   drm/i915/dp: Use consistent name for link bpp and compressed bpp
> 
>  drivers/gpu/drm/i915/display/icl_dsi.c        |   1 +
>  drivers/gpu/drm/i915/display/intel_crt.c      |   1 +
>  .../drm/i915/display/intel_crtc_state_dump.c  |   5 +-
>  drivers/gpu/drm/i915/display/intel_display.c  |   5 +
>  .../drm/i915/display/intel_display_types.h    |  12 +-
>  drivers/gpu/drm/i915/display/intel_dp.c       | 494 ++++++++++++------
>  drivers/gpu/drm/i915/display/intel_dp.h       |  14 +-
>  drivers/gpu/drm/i915/display/intel_dp_mst.c   |  27 +-
>  drivers/gpu/drm/i915/display/intel_dvo.c      |   1 +
>  drivers/gpu/drm/i915/display/intel_hdmi.c     |  71 ++-
>  drivers/gpu/drm/i915/display/intel_hdmi.h     |   5 +-
>  drivers/gpu/drm/i915/display/intel_lvds.c     |   1 +
>  drivers/gpu/drm/i915/display/intel_sdvo.c     |   1 +
>  drivers/gpu/drm/i915/display/intel_tv.c       |   1 +
>  drivers/gpu/drm/i915/display/vlv_dsi.c        |   1 +
>  15 files changed, 437 insertions(+), 203 deletions(-)
> 
> -- 
> 2.25.1

-- 
Ville Syrjälä
Intel