From: Michal Wajdeczko <michal.wajdeczko@intel.com>
To: Vinay Belgaumkar <vinay.belgaumkar@intel.com>,
intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH 10/15] drm/i915/guc/slpc: Add debugfs for SLPC info
Date: Tue, 27 Jul 2021 17:37:23 +0200 [thread overview]
Message-ID: <b4ab8758-6483-fbef-bfb4-2a9e55419698@intel.com> (raw)
In-Reply-To: <20210726190800.26762-11-vinay.belgaumkar@intel.com>
On 26.07.2021 21:07, Vinay Belgaumkar wrote:
> This prints out relevant SLPC info from the SLPC shared structure.
>
> We will send a h2g message which forces SLPC to update the
s/h2g/H2G
> shared data structure with latest information before reading it.
>
> v2: Address review comments (Michal W)
> v3: Remove unnecessary tasks from slpc_info (Michal W)
>
> Signed-off-by: Vinay Belgaumkar <vinay.belgaumkar@intel.com>
> Signed-off-by: Sundaresan Sujaritha <sujaritha.sundaresan@intel.com>
> ---
> .../gpu/drm/i915/gt/uc/intel_guc_debugfs.c | 22 ++++++++++++++
> drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c | 29 +++++++++++++++++++
> drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.h | 4 ++-
> 3 files changed, 54 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_debugfs.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_debugfs.c
> index 72ddfff42f7d..3244e54b1337 100644
> --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_debugfs.c
> +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_debugfs.c
> @@ -12,6 +12,7 @@
> #include "gt/uc/intel_guc_ct.h"
> #include "gt/uc/intel_guc_ads.h"
> #include "gt/uc/intel_guc_submission.h"
> +#include "gt/uc/intel_guc_slpc.h"
>
> static int guc_info_show(struct seq_file *m, void *data)
> {
> @@ -50,11 +51,32 @@ static int guc_registered_contexts_show(struct seq_file *m, void *data)
> }
> DEFINE_GT_DEBUGFS_ATTRIBUTE(guc_registered_contexts);
>
> +static int guc_slpc_info_show(struct seq_file *m, void *unused)
> +{
> + struct intel_guc *guc = m->private;
> + struct intel_guc_slpc *slpc = &guc->slpc;
> + struct drm_printer p = drm_seq_file_printer(m);
> +
> + if (!intel_guc_slpc_is_used(guc))
> + return -ENODEV;
> +
> + return intel_guc_slpc_info(slpc, &p);
> +}
> +DEFINE_GT_DEBUGFS_ATTRIBUTE(guc_slpc_info);
> +
> +static bool intel_eval_slpc_support(void *data)
> +{
> + struct intel_guc *guc = (struct intel_guc *)data;
> +
> + return intel_guc_slpc_is_used(guc);
> +}
> +
> void intel_guc_debugfs_register(struct intel_guc *guc, struct dentry *root)
> {
> static const struct debugfs_gt_file files[] = {
> { "guc_info", &guc_info_fops, NULL },
> { "guc_registered_contexts", &guc_registered_contexts_fops, NULL },
> + { "guc_slpc_info", &guc_slpc_info_fops, &intel_eval_slpc_support},
> };
>
> if (!intel_guc_is_supported(guc))
> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c
> index c653bba3b5eb..995d3d4807a3 100644
> --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c
> +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c
> @@ -448,6 +448,35 @@ int intel_guc_slpc_enable(struct intel_guc_slpc *slpc)
> return 0;
> }
>
> +int intel_guc_slpc_info(struct intel_guc_slpc *slpc, struct drm_printer *p)
nit: intel_guc_slpc_print_info ?
> +{
> + struct drm_i915_private *i915 = guc_to_gt(slpc_to_guc(slpc))->i915;
use slpc_to_i915()
> + struct slpc_shared_data *data = slpc->vaddr;
> + struct slpc_task_state_data *slpc_tasks;
> + intel_wakeref_t wakeref;
> + int ret = 0;
> +
> + GEM_BUG_ON(!slpc->vma);
> +
> + with_intel_runtime_pm(&i915->runtime_pm, wakeref) {
> + ret = slpc_query_task_state(slpc);
> +
> + if (!ret) {
> + slpc_tasks = &data->task_state_data;
> +
> + drm_printf(p, "\tSLPC state: %s\n", slpc_get_state_string(slpc));
> + drm_printf(p, "\tGTPERF task active: %s\n",
> + yesno(slpc_tasks->status & SLPC_GTPERF_TASK_ENABLED));
> + drm_printf(p, "\tMax freq: %u MHz\n",
> + slpc_decode_max_freq(slpc));
> + drm_printf(p, "\tMin freq: %u MHz\n",
> + slpc_decode_min_freq(slpc));
> + }
> + }
> +
> + return ret;
> +}
> +
> void intel_guc_slpc_fini(struct intel_guc_slpc *slpc)
> {
> if (!slpc->vma)
> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.h b/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.h
> index 92d7afd44f07..d133c8020c16 100644
> --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.h
> +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.h
> @@ -9,6 +9,8 @@
> #include "intel_guc_submission.h"
> #include "intel_guc_slpc_types.h"
>
> +struct drm_printer;
> +
> static inline bool intel_guc_slpc_is_supported(struct intel_guc *guc)
> {
> return guc->slpc_supported;
> @@ -25,7 +27,6 @@ static inline bool intel_guc_slpc_is_used(struct intel_guc *guc)
> }
>
> void intel_guc_slpc_init_early(struct intel_guc_slpc *slpc);
> -
this should be fixed in earlier patch
with all that fixed,
Reviewed-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
> int intel_guc_slpc_init(struct intel_guc_slpc *slpc);
> int intel_guc_slpc_enable(struct intel_guc_slpc *slpc);
> void intel_guc_slpc_fini(struct intel_guc_slpc *slpc);
> @@ -33,5 +34,6 @@ int intel_guc_slpc_set_max_freq(struct intel_guc_slpc *slpc, u32 val);
> int intel_guc_slpc_set_min_freq(struct intel_guc_slpc *slpc, u32 val);
> int intel_guc_slpc_get_max_freq(struct intel_guc_slpc *slpc, u32 *val);
> int intel_guc_slpc_get_min_freq(struct intel_guc_slpc *slpc, u32 *val);
> +int intel_guc_slpc_info(struct intel_guc_slpc *slpc, struct drm_printer *p);
>
> #endif
>
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next prev parent reply other threads:[~2021-07-27 15:38 UTC|newest]
Thread overview: 53+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-07-26 19:07 [Intel-gfx] [PATCH v3 00/15] drm/i915/guc/slpc: Enable GuC based power management features Vinay Belgaumkar
2021-07-26 19:07 ` [Intel-gfx] [PATCH 01/15] drm/i915/guc: SQUASHED PATCH - DO NOT REVIEW Vinay Belgaumkar
2021-07-26 19:07 ` [Intel-gfx] [PATCH 02/15] drm/i915/guc/slpc: Initial definitions for SLPC Vinay Belgaumkar
2021-07-27 13:43 ` Michal Wajdeczko
2021-07-27 18:47 ` Belgaumkar, Vinay
2021-07-26 19:07 ` [Intel-gfx] [PATCH 03/15] drm/i915/guc/slpc: Gate Host RPS when SLPC is enabled Vinay Belgaumkar
2021-07-27 22:44 ` Matthew Brost
2021-07-27 22:48 ` Belgaumkar, Vinay
2021-07-27 22:50 ` Matthew Brost
2021-07-26 19:07 ` [Intel-gfx] [PATCH 04/15] drm/i915/guc/slpc: Adding SLPC communication interfaces Vinay Belgaumkar
2021-07-27 13:59 ` Michal Wajdeczko
2021-07-27 19:03 ` Belgaumkar, Vinay
2021-07-26 19:07 ` [Intel-gfx] [PATCH 05/15] drm/i915/guc/slpc: Allocate, initialize and release SLPC Vinay Belgaumkar
2021-07-27 14:03 ` Michal Wajdeczko
2021-07-26 19:07 ` [Intel-gfx] [PATCH 06/15] drm/i915/guc/slpc: Enable SLPC and add related H2G events Vinay Belgaumkar
2021-07-27 15:12 ` Michal Wajdeczko
2021-07-27 20:00 ` Belgaumkar, Vinay
2021-07-27 20:19 ` Michal Wajdeczko
2021-07-27 20:52 ` Belgaumkar, Vinay
2021-07-26 19:07 ` [Intel-gfx] [PATCH 07/15] drm/i915/guc/slpc: Remove BUG_ON in guc_submission_disable Vinay Belgaumkar
2021-07-28 0:20 ` Matthew Brost
2021-07-28 1:01 ` Belgaumkar, Vinay
2021-07-28 1:06 ` Matthew Brost
2021-07-26 19:07 ` [Intel-gfx] [PATCH 08/15] drm/i915/guc/slpc: Add methods to set min/max frequency Vinay Belgaumkar
2021-07-27 15:24 ` Michal Wajdeczko
2021-07-27 22:35 ` Belgaumkar, Vinay
2021-07-28 4:03 ` Belgaumkar, Vinay
2021-07-26 19:07 ` [Intel-gfx] [PATCH 09/15] drm/i915/guc/slpc: Add get max/min freq hooks Vinay Belgaumkar
2021-07-27 15:32 ` Michal Wajdeczko
2021-07-27 23:10 ` Belgaumkar, Vinay
2021-07-26 19:07 ` [Intel-gfx] [PATCH 10/15] drm/i915/guc/slpc: Add debugfs for SLPC info Vinay Belgaumkar
2021-07-27 15:37 ` Michal Wajdeczko [this message]
2021-07-28 0:10 ` Belgaumkar, Vinay
2021-07-26 19:07 ` [Intel-gfx] [PATCH 11/15] drm/i915/guc/slpc: Enable ARAT timer interrupt Vinay Belgaumkar
2021-07-27 15:40 ` Matthew Brost
2021-07-28 0:15 ` Belgaumkar, Vinay
2021-07-26 19:07 ` [Intel-gfx] [PATCH 12/15] drm/i915/guc/slpc: Cache platform frequency limits Vinay Belgaumkar
2021-07-27 16:00 ` Michal Wajdeczko
2021-07-28 1:27 ` Belgaumkar, Vinay
2021-07-26 19:07 ` [Intel-gfx] [PATCH 13/15] drm/i915/guc/slpc: Sysfs hooks for SLPC Vinay Belgaumkar
2021-07-27 16:59 ` Michal Wajdeczko
2021-07-28 15:29 ` Belgaumkar, Vinay
2021-07-26 19:07 ` [Intel-gfx] [PATCH 14/15] drm/i915/guc/slpc: Add SLPC selftest Vinay Belgaumkar
2021-07-27 19:16 ` Matthew Brost
2021-07-27 22:25 ` Belgaumkar, Vinay
2021-07-26 19:08 ` [Intel-gfx] [PATCH 15/15] drm/i915/guc/rc: Setup and enable GUCRC feature Vinay Belgaumkar
2021-07-27 15:37 ` Matt Roper
2021-07-27 16:18 ` Belgaumkar, Vinay
2021-07-27 19:49 ` Matt Roper
2021-07-26 19:34 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/guc/slpc: Enable GuC based power management features Patchwork
2021-07-26 19:36 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2021-07-26 19:59 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2021-07-26 23:32 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
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