From: Greg KH <greg@kroah.com>
To: Muni Sekhar <munisekharrms@gmail.com>
Cc: kernelnewbies <kernelnewbies@kernelnewbies.org>
Subject: Re: read the memory mapped address - pcie - kernel hangs
Date: Wed, 8 Jan 2020 20:45:03 +0100 [thread overview]
Message-ID: <20200108194503.GA2555481@kroah.com> (raw)
In-Reply-To: <CAHhAz+ihy2R-2NxjLC6iCOyQ5=T7Rs_D8gH+1vxLFBSBnS8-_A@mail.gmail.com>
On Thu, Jan 09, 2020 at 12:30:20AM +0530, Muni Sekhar wrote:
> Hi All,
>
> I have module with Xilinx FPGA. It implements UART(s), SPI(s),
> parallel I/O and interfaces them to the Host CPU via PCI Express bus.
> I see that my system freezes without capturing the crash dump for certain tests.
> I debugged this issue and it was tracked down to the ‘readl()’ in
> interrupt handler code
>
> In ISR, first reads the Interrupt Status register using ‘readl()’ as
> given below.
> status = readl(ctrl->reg + INT_STATUS);
>
> And then clears the pending interrupts using ‘writel()’ as given blow.
> writel(status, ctrl->reg + INT_STATUS);
>
> I've noticed a kernel hang if INT_STATUS register read again after
> clearing the pending interrupts.
Why would you read that register again after writing to it?
And are you sure you are reading/writing the correct size of the irq
field? I thought it was a "word" not "long"? But that might depend on
your hardware, do you have a pointer to the kernel driver source you are
using for all of this?
thanks,
greg k-h
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next prev parent reply other threads:[~2020-01-08 19:45 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-01-08 19:00 read the memory mapped address - pcie - kernel hangs Muni Sekhar
2020-01-08 19:45 ` Greg KH [this message]
2020-01-09 11:14 ` Muni Sekhar
2020-01-09 11:37 ` Greg KH
2020-01-09 12:20 ` Muni Sekhar
2020-01-09 18:12 ` Greg KH
2020-01-10 11:15 ` Primoz Beltram
2020-01-10 14:58 ` Muni Sekhar
2020-01-10 23:03 ` Onur Atilla
2020-01-11 3:13 ` Muni Sekhar
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