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From: Wanpeng Li <kernellwp@gmail.com>
To: linux-kernel@vger.kernel.org, kvm@vger.kernel.org
Cc: Paolo Bonzini <pbonzini@redhat.com>,
	Sean Christopherson <seanjc@google.com>,
	Vitaly Kuznetsov <vkuznets@redhat.com>,
	Wanpeng Li <wanpengli@tencent.com>,
	Jim Mattson <jmattson@google.com>, Joerg Roedel <joro@8bytes.org>
Subject: [PATCH 1/2] KVM: LAPIC: write 0 to TMICT should also cancel vmx-preemption timer
Date: Thu,  3 Jun 2021 02:00:40 -0700	[thread overview]
Message-ID: <1622710841-76604-1-git-send-email-wanpengli@tencent.com> (raw)

From: Wanpeng Li <wanpengli@tencent.com>
 
According to the SDM 10.5.4.1:

  A write of 0 to the initial-count register effectively stops the local
  APIC timer, in both one-shot and periodic mode.

The lapic timer oneshot/periodic mode which is emulated by vmx-preemption 
timer doesn't stop since vmx->hv_deadline_tsc is still set. This patch 
fixes it by also cancel vmx-preemption timer when writing 0 to initial-count 
register.

Signed-off-by: Wanpeng Li <wanpengli@tencent.com>
---
 arch/x86/kvm/lapic.c | 17 +++++++++++------
 1 file changed, 11 insertions(+), 6 deletions(-)

diff --git a/arch/x86/kvm/lapic.c b/arch/x86/kvm/lapic.c
index 8120e86..20dd2ae 100644
--- a/arch/x86/kvm/lapic.c
+++ b/arch/x86/kvm/lapic.c
@@ -1494,6 +1494,15 @@ static void limit_periodic_timer_frequency(struct kvm_lapic *apic)
 
 static void cancel_hv_timer(struct kvm_lapic *apic);
 
+static void cancel_timer(struct kvm_lapic *apic)
+{
+	hrtimer_cancel(&apic->lapic_timer.timer);
+	preempt_disable();
+	if (apic->lapic_timer.hv_timer_in_use)
+		cancel_hv_timer(apic);
+	preempt_enable();
+}
+
 static void apic_update_lvtt(struct kvm_lapic *apic)
 {
 	u32 timer_mode = kvm_lapic_get_reg(apic, APIC_LVTT) &
@@ -1502,11 +1511,7 @@ static void apic_update_lvtt(struct kvm_lapic *apic)
 	if (apic->lapic_timer.timer_mode != timer_mode) {
 		if (apic_lvtt_tscdeadline(apic) != (timer_mode ==
 				APIC_LVT_TIMER_TSCDEADLINE)) {
-			hrtimer_cancel(&apic->lapic_timer.timer);
-			preempt_disable();
-			if (apic->lapic_timer.hv_timer_in_use)
-				cancel_hv_timer(apic);
-			preempt_enable();
+			cancel_timer(apic);
 			kvm_lapic_set_reg(apic, APIC_TMICT, 0);
 			apic->lapic_timer.period = 0;
 			apic->lapic_timer.tscdeadline = 0;
@@ -2092,7 +2097,7 @@ int kvm_lapic_reg_write(struct kvm_lapic *apic, u32 reg, u32 val)
 		if (apic_lvtt_tscdeadline(apic))
 			break;
 
-		hrtimer_cancel(&apic->lapic_timer.timer);
+		cancel_timer(apic);
 		kvm_lapic_set_reg(apic, APIC_TMICT, val);
 		start_apic_timer(apic);
 		break;
-- 
2.7.4


             reply	other threads:[~2021-06-03  9:02 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-06-03  9:00 Wanpeng Li [this message]
2021-06-03  9:00 ` [PATCH 2/2] KVM: LAPIC: reset TMCCT during vCPU reset Wanpeng Li
2021-06-03 12:27   ` Jim Mattson
2021-06-03 15:34     ` Sean Christopherson
2021-06-08  0:31       ` Wanpeng Li
2021-06-03 15:20 ` [PATCH 1/2] KVM: LAPIC: write 0 to TMICT should also cancel vmx-preemption timer Sean Christopherson
2021-06-04  0:36   ` Wanpeng Li
2021-06-04 15:37     ` Sean Christopherson
2021-06-08  0:30       ` Wanpeng Li
2021-06-03 23:02 ` David Matlack
2021-06-04  0:32   ` Wanpeng Li
2021-06-04 15:59     ` David Matlack

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