From: Krish Sadhukhan <krish.sadhukhan@oracle.com>
To: kvm@vger.kernel.org
Cc: pbonzini@redhat.com, rkrcmar@redhat.com, jmattson@google.com
Subject: [PATCH 3/8][KVM VMX]: Add a function to check reserved bits in MSR_CORE_PERF_GLOBAL_CTRL
Date: Wed, 24 Apr 2019 19:17:19 -0400 [thread overview]
Message-ID: <20190424231724.2014-4-krish.sadhukhan@oracle.com> (raw)
In-Reply-To: <20190424231724.2014-1-krish.sadhukhan@oracle.com>
Signed-off-by: Krish Sadhukhan <krish.sadhukhan@oracle.com>
Reviewed-by: Karl Heubaum <karl.heubaum@oracle.com>
---
arch/x86/include/asm/kvm_host.h | 1 +
arch/x86/include/asm/msr-index.h | 7 +++++++
arch/x86/kvm/x86.c | 20 ++++++++++++++++++++
3 files changed, 28 insertions(+)
diff --git a/arch/x86/include/asm/kvm_host.h b/arch/x86/include/asm/kvm_host.h
index 4660ce90de7f..c5b3c63129a6 100644
--- a/arch/x86/include/asm/kvm_host.h
+++ b/arch/x86/include/asm/kvm_host.h
@@ -1311,6 +1311,7 @@ int kvm_emulate_instruction_from_buffer(struct kvm_vcpu *vcpu,
void kvm_enable_efer_bits(u64);
bool kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer);
+bool kvm_valid_perf_global_ctrl(u64 perf_global);
int kvm_get_msr(struct kvm_vcpu *vcpu, struct msr_data *msr);
int kvm_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr);
diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h
index 8e40c2446fd1..d10e8d4b2842 100644
--- a/arch/x86/include/asm/msr-index.h
+++ b/arch/x86/include/asm/msr-index.h
@@ -775,6 +775,13 @@
#define MSR_CORE_PERF_GLOBAL_CTRL 0x0000038f
#define MSR_CORE_PERF_GLOBAL_OVF_CTRL 0x00000390
+/* MSR_CORE_PERF_GLOBAL_CTRL bits */
+#define PERF_GLOBAL_CTRL_PMC0_ENABLE (1ull << 0)
+#define PERF_GLOBAL_CTRL_PMC1_ENABLE (1ull << 1)
+#define PERF_GLOBAL_CTRL_FIXED0_ENABLE (1ull << 32)
+#define PERF_GLOBAL_CTRL_FIXED1_ENABLE (1ull << 33)
+#define PERF_GLOBAL_CTRL_FIXED2_ENABLE (1ull << 34)
+
/* Geode defined MSRs */
#define MSR_GEODE_BUSCONT_CONF0 0x00001900
diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c
index 02c8e095a239..ecddb8baaa7f 100644
--- a/arch/x86/kvm/x86.c
+++ b/arch/x86/kvm/x86.c
@@ -89,8 +89,19 @@ EXPORT_SYMBOL_GPL(kvm_mce_cap_supported);
#ifdef CONFIG_X86_64
static
u64 __read_mostly efer_reserved_bits = ~((u64)(EFER_SCE | EFER_LME | EFER_LMA));
+static
+u64 __read_mostly perf_global_ctrl_reserved_bits =
+ ~((u64)(PERF_GLOBAL_CTRL_PMC0_ENABLE |
+ PERF_GLOBAL_CTRL_PMC1_ENABLE |
+ PERF_GLOBAL_CTRL_FIXED0_ENABLE |
+ PERF_GLOBAL_CTRL_FIXED1_ENABLE |
+ PERF_GLOBAL_CTRL_FIXED2_ENABLE));
#else
static u64 __read_mostly efer_reserved_bits = ~((u64)EFER_SCE);
+static
+u64 __read_mostly perf_global_ctrl_reserved_bits =
+ ~((u64)(PERF_GLOBAL_CTRL_PMC0_ENABLE |
+ PERF_GLOBAL_CTRL_PMC1_ENABLE));
#endif
#define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
@@ -1255,6 +1266,15 @@ static int do_get_msr_feature(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
return 0;
}
+bool kvm_valid_perf_global_ctrl(u64 perf_global)
+{
+ if (perf_global & perf_global_ctrl_reserved_bits)
+ return false;
+
+ return true;
+}
+EXPORT_SYMBOL_GPL(kvm_valid_perf_global_ctrl);
+
bool kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer)
{
if (efer & efer_reserved_bits)
--
2.17.2
next prev parent reply other threads:[~2019-04-24 23:43 UTC|newest]
Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-04-24 23:17 [KVM nVMX]: Check "load IA32_PERF_GLOBAL_CTRL" on vmentry of nested guests Krish Sadhukhan
2019-04-24 23:17 ` [PATCH 1/8][KVMnVMX]: Enable "load IA32_PERF_GLOBAL_CTRL" VM-exit control for " Krish Sadhukhan
2019-05-13 18:49 ` Sean Christopherson
2019-05-13 22:08 ` Krish Sadhukhan
2019-04-24 23:17 ` [PATCH 2/8][KVM nVMX]: Enable "load IA32_PERF_GLOBAL_CTRL" VM-entry " Krish Sadhukhan
2019-05-13 18:49 ` Sean Christopherson
2019-04-24 23:17 ` Krish Sadhukhan [this message]
2019-05-13 18:57 ` [PATCH 3/8][KVM VMX]: Add a function to check reserved bits in MSR_CORE_PERF_GLOBAL_CTRL Sean Christopherson
2019-08-15 22:29 ` Jim Mattson
2019-04-24 23:17 ` [PATCH 4/8][KVM nVMX]: Check "load IA32_PERF_GLOBAL_CTRL" VM-exit control on vmentry of nested guests Krish Sadhukhan
2019-05-13 19:00 ` Sean Christopherson
2019-05-16 22:07 ` Krish Sadhukhan
2019-05-17 20:34 ` Sean Christopherson
2019-08-15 22:54 ` Jim Mattson
2019-04-24 23:17 ` [PATCH 5/8][KVM nVMX]: Check "load IA32_PERF_GLOBAL_CTRL" VM-entry " Krish Sadhukhan
2019-08-15 22:36 ` Jim Mattson
2019-04-24 23:17 ` [PATCH 6/8][KVM nVMX]: Load IA32_PERF_GLOBAL_CTRL MSR " Krish Sadhukhan
2019-08-15 22:44 ` Jim Mattson
2019-08-21 23:05 ` Krish Sadhukhan
2019-08-21 23:10 ` Jim Mattson
2019-08-23 5:29 ` Krish Sadhukhan
2019-08-23 15:57 ` Jim Mattson
2019-04-24 23:17 ` [PATCH 7/8][KVM nVMX]: Enable "load IA32_PERF_GLOBAL_CTRL VM-{entry,exit} controls Krish Sadhukhan
2019-05-13 19:12 ` Sean Christopherson
2019-08-15 23:02 ` Jim Mattson
2019-04-24 23:17 ` [PATCH 8/8][KVM nVMX]: Test "load IA32_PERF_GLOBAL_CTRL" controls on vmentry of nested guests Krish Sadhukhan
2019-05-13 18:46 ` [KVM nVMX]: Check "load IA32_PERF_GLOBAL_CTRL" " Sean Christopherson
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