From: Sean Christopherson <sean.j.christopherson@intel.com>
To: Jim Mattson <jmattson@google.com>
Cc: Chenyi Qiang <chenyi.qiang@intel.com>,
Paolo Bonzini <pbonzini@redhat.com>,
Vitaly Kuznetsov <vkuznets@redhat.com>,
Wanpeng Li <wanpengli@tencent.com>,
Joerg Roedel <joro@8bytes.org>, Xiaoyao Li <xiaoyao.li@intel.com>,
kvm list <kvm@vger.kernel.org>,
LKML <linux-kernel@vger.kernel.org>
Subject: Re: [RFC 6/7] KVM: X86: Expose PKS to guest and userspace
Date: Tue, 29 Sep 2020 21:36:34 -0700 [thread overview]
Message-ID: <20200930043634.GA29319@linux.intel.com> (raw)
In-Reply-To: <CALMp9eQ=QUZ04_26eXBGHqvQYnsN6JEgiV=ZSSrE395KLX-atA@mail.gmail.com>
On Thu, Aug 13, 2020 at 12:04:54PM -0700, Jim Mattson wrote:
> On Fri, Aug 7, 2020 at 1:47 AM Chenyi Qiang <chenyi.qiang@intel.com> wrote:
> >
> > Existence of PKS is enumerated via CPUID.(EAX=7H,ECX=0):ECX[31]. It is
> > enabled by setting CR4.PKS when long mode is active. PKS is only
> > implemented when EPT is enabled and requires the support of VM_{ENTRY,
> > EXIT}_LOAD_IA32_PKRS currently.
> >
> > Signed-off-by: Chenyi Qiang <chenyi.qiang@intel.com>
>
> > @@ -967,7 +969,8 @@ int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
> > {
> > unsigned long old_cr4 = kvm_read_cr4(vcpu);
> > unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE |
> > - X86_CR4_SMEP | X86_CR4_SMAP | X86_CR4_PKE;
> > + X86_CR4_SMEP | X86_CR4_SMAP | X86_CR4_PKE |
> > + X86_CR4_PKS;
>
> This list already seems overly long, but I don't think CR4.PKS belongs
> here. In volume 3 of the SDM, section 4.4.1, it says:
>
> - If PAE paging would be in use following an execution of MOV to CR0
> or MOV to CR4 (see Section 4.1.1) and the instruction is modifying any
> of CR0.CD, CR0.NW, CR0.PG, CR4.PAE, CR4.PGE, CR4.PSE, or CR4.SMEP;
> then the PDPTEs are loaded from the address in CR3.
>
> CR4.PKS is not in the list of CR4 bits that result in a PDPTE load.
> Since it has no effect on PAE paging, I would be surprised if it did
> result in a PDPTE load.
It does belong in the mmu_role_bits though ;-)
next prev parent reply other threads:[~2020-09-30 4:36 UTC|newest]
Thread overview: 38+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-08-07 8:48 [RFC 0/7] KVM: PKS Virtualization support Chenyi Qiang
2020-08-07 8:48 ` [RFC 1/7] KVM: VMX: Introduce PKS VMCS fields Chenyi Qiang
2020-08-10 23:17 ` Jim Mattson
2020-08-07 8:48 ` [RFC 2/7] KVM: VMX: Expose IA32_PKRS MSR Chenyi Qiang
2020-08-12 21:21 ` Jim Mattson
2020-08-13 5:42 ` Chenyi Qiang
2020-08-13 17:31 ` Jim Mattson
2020-08-18 7:27 ` Chenyi Qiang
2020-08-18 18:23 ` Jim Mattson
2020-08-22 3:28 ` Sean Christopherson
2021-01-26 18:01 ` Paolo Bonzini
2021-01-27 7:55 ` Chenyi Qiang
2021-02-01 9:53 ` Chenyi Qiang
2021-02-01 10:05 ` Paolo Bonzini
2020-08-07 8:48 ` [RFC 3/7] KVM: MMU: Rename the pkru to pkr Chenyi Qiang
2021-01-26 18:16 ` Paolo Bonzini
2020-08-07 8:48 ` [RFC 4/7] KVM: MMU: Refactor pkr_mask to cache condition Chenyi Qiang
2021-01-26 18:16 ` Paolo Bonzini
2021-01-27 3:14 ` Chenyi Qiang
2020-08-07 8:48 ` [RFC 5/7] KVM: MMU: Add support for PKS emulation Chenyi Qiang
2021-01-26 18:23 ` Paolo Bonzini
2021-01-27 3:00 ` Chenyi Qiang
2021-01-27 8:37 ` Paolo Bonzini
2020-08-07 8:48 ` [RFC 6/7] KVM: X86: Expose PKS to guest and userspace Chenyi Qiang
2020-08-13 19:04 ` Jim Mattson
2020-08-14 2:33 ` Chenyi Qiang
2020-09-30 4:36 ` Sean Christopherson [this message]
2021-01-26 18:24 ` Paolo Bonzini
2021-01-26 19:56 ` Sean Christopherson
2021-01-26 20:05 ` Paolo Bonzini
2020-08-07 8:48 ` [RFC 7/7] KVM: VMX: Enable PKS for nested VM Chenyi Qiang
2020-08-11 0:05 ` Jim Mattson
2020-08-12 15:00 ` Sean Christopherson
2020-08-12 18:32 ` Jim Mattson
2020-08-13 4:52 ` Chenyi Qiang
2020-08-13 17:52 ` Jim Mattson
2020-08-14 10:07 ` Chenyi Qiang
2020-08-14 17:34 ` Jim Mattson
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20200930043634.GA29319@linux.intel.com \
--to=sean.j.christopherson@intel.com \
--cc=chenyi.qiang@intel.com \
--cc=jmattson@google.com \
--cc=joro@8bytes.org \
--cc=kvm@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=pbonzini@redhat.com \
--cc=vkuznets@redhat.com \
--cc=wanpengli@tencent.com \
--cc=xiaoyao.li@intel.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).