From: Marc Zyngier <maz@kernel.org>
To: kvmarm@lists.cs.columbia.edu,
linux-arm-kernel@lists.infradead.org, kvm@vger.kernel.org
Cc: dave.martin@arm.com, daniel.kiss@arm.com,
Will Deacon <will@kernel.org>,
Catalin Marinas <catalin.marinas@arm.com>,
James Morse <james.morse@arm.com>,
Julien Thierry <julien.thierry.kdev@gmail.com>,
Suzuki K Poulose <suzuki.poulose@arm.com>,
broonie@kernel.org, kernel-team@android.com
Subject: [PATCH 04/10] KVM: arm64: Introduce vcpu_sve_vq() helper
Date: Tue, 16 Mar 2021 10:13:06 +0000 [thread overview]
Message-ID: <20210316101312.102925-5-maz@kernel.org> (raw)
In-Reply-To: <20210316101312.102925-1-maz@kernel.org>
The KVM code contains a number of "sve_vq_from_vl(vcpu->arch.sve_max_vl)"
instances, and we are about to add more.
Introduce vcpu_sve_vq() as a shorthand for this expression.
Signed-off-by: Marc Zyngier <maz@kernel.org>
---
arch/arm64/include/asm/kvm_host.h | 4 +++-
arch/arm64/kvm/guest.c | 6 +++---
arch/arm64/kvm/hyp/include/hyp/switch.h | 2 +-
3 files changed, 7 insertions(+), 5 deletions(-)
diff --git a/arch/arm64/include/asm/kvm_host.h b/arch/arm64/include/asm/kvm_host.h
index fb1d78299ba0..c4afe3d3397f 100644
--- a/arch/arm64/include/asm/kvm_host.h
+++ b/arch/arm64/include/asm/kvm_host.h
@@ -375,6 +375,8 @@ struct kvm_vcpu_arch {
#define vcpu_sve_pffr(vcpu) (kern_hyp_va((vcpu)->arch.sve_state) + \
sve_ffr_offset((vcpu)->arch.sve_max_vl))
+#define vcpu_sve_vq(vcpu) sve_vq_from_vl((vcpu)->arch.sve_max_vl)
+
#define vcpu_sve_state_size(vcpu) ({ \
size_t __size_ret; \
unsigned int __vcpu_vq; \
@@ -382,7 +384,7 @@ struct kvm_vcpu_arch {
if (WARN_ON(!sve_vl_valid((vcpu)->arch.sve_max_vl))) { \
__size_ret = 0; \
} else { \
- __vcpu_vq = sve_vq_from_vl((vcpu)->arch.sve_max_vl); \
+ __vcpu_vq = vcpu_sve_vq(vcpu); \
__size_ret = SVE_SIG_REGS_SIZE(__vcpu_vq); \
} \
\
diff --git a/arch/arm64/kvm/guest.c b/arch/arm64/kvm/guest.c
index 9bbd30e62799..5e7cefbe8509 100644
--- a/arch/arm64/kvm/guest.c
+++ b/arch/arm64/kvm/guest.c
@@ -299,7 +299,7 @@ static int get_sve_vls(struct kvm_vcpu *vcpu, const struct kvm_one_reg *reg)
memset(vqs, 0, sizeof(vqs));
- max_vq = sve_vq_from_vl(vcpu->arch.sve_max_vl);
+ max_vq = vcpu_sve_vq(vcpu);
for (vq = SVE_VQ_MIN; vq <= max_vq; ++vq)
if (sve_vq_available(vq))
vqs[vq_word(vq)] |= vq_mask(vq);
@@ -427,7 +427,7 @@ static int sve_reg_to_region(struct sve_state_reg_region *region,
if (!vcpu_has_sve(vcpu) || (reg->id & SVE_REG_SLICE_MASK) > 0)
return -ENOENT;
- vq = sve_vq_from_vl(vcpu->arch.sve_max_vl);
+ vq = vcpu_sve_vq(vcpu);
reqoffset = SVE_SIG_ZREG_OFFSET(vq, reg_num) -
SVE_SIG_REGS_OFFSET;
@@ -437,7 +437,7 @@ static int sve_reg_to_region(struct sve_state_reg_region *region,
if (!vcpu_has_sve(vcpu) || (reg->id & SVE_REG_SLICE_MASK) > 0)
return -ENOENT;
- vq = sve_vq_from_vl(vcpu->arch.sve_max_vl);
+ vq = vcpu_sve_vq(vcpu);
reqoffset = SVE_SIG_PREG_OFFSET(vq, reg_num) -
SVE_SIG_REGS_OFFSET;
diff --git a/arch/arm64/kvm/hyp/include/hyp/switch.h b/arch/arm64/kvm/hyp/include/hyp/switch.h
index d762d5bdc2d5..fb68271c1a0f 100644
--- a/arch/arm64/kvm/hyp/include/hyp/switch.h
+++ b/arch/arm64/kvm/hyp/include/hyp/switch.h
@@ -268,7 +268,7 @@ static inline bool __hyp_handle_fpsimd(struct kvm_vcpu *vcpu)
if (sve_guest) {
__sve_restore_state(vcpu_sve_pffr(vcpu),
&vcpu->arch.ctxt.fp_regs.fpsr,
- sve_vq_from_vl(vcpu->arch.sve_max_vl) - 1);
+ vcpu_sve_vq(vcpu) - 1);
write_sysreg_el1(__vcpu_sys_reg(vcpu, ZCR_EL1), SYS_ZCR);
} else {
__fpsimd_restore_state(&vcpu->arch.ctxt.fp_regs);
--
2.29.2
next prev parent reply other threads:[~2021-03-16 10:14 UTC|newest]
Thread overview: 31+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-03-16 10:13 [PATCH 00/10] KVM: arm64: Enable SVE support on nVHE systems Marc Zyngier
2021-03-16 10:13 ` [PATCH 01/10] KVM: arm64: Provide KVM's own save/restore SVE primitives Marc Zyngier
2021-03-16 10:31 ` Quentin Perret
2021-03-16 12:17 ` Marc Zyngier
2021-03-17 14:30 ` Will Deacon
2021-03-16 10:13 ` [PATCH 02/10] KVM: arm64: Use {read,write}_sysreg_el1 to access ZCR_EL1 Marc Zyngier
2021-03-17 14:31 ` Will Deacon
2021-03-16 10:13 ` [PATCH 03/10] KVM: arm64: Let vcpu_sve_pffr() handle HYP VAs Marc Zyngier
2021-03-17 14:31 ` Will Deacon
2021-03-16 10:13 ` Marc Zyngier [this message]
2021-03-17 14:01 ` [PATCH 04/10] KVM: arm64: Introduce vcpu_sve_vq() helper Will Deacon
2021-03-16 10:13 ` [PATCH 05/10] KVM: arm64: Rework SVE host-save/guest-restore Marc Zyngier
2021-03-17 14:29 ` Will Deacon
2021-03-17 14:54 ` Marc Zyngier
2021-03-16 10:13 ` [PATCH 06/10] KVM: arm64: Map SVE context at EL2 when available Marc Zyngier
2021-03-17 16:01 ` Will Deacon
2021-03-18 8:56 ` Marc Zyngier
2021-03-16 10:13 ` [PATCH 07/10] KVM: arm64: Save guest's ZCR_EL1 before saving the FPSIMD state Marc Zyngier
2021-03-17 17:17 ` Will Deacon
2021-03-17 17:20 ` Will Deacon
2021-03-16 10:13 ` [PATCH 08/10] KVM: arm64: Add a nVHE-specific SVE VQ reset hypercall Marc Zyngier
2021-03-16 10:45 ` Quentin Perret
2021-03-16 12:18 ` Marc Zyngier
2021-03-16 14:24 ` Andrew Scull
2021-03-16 15:00 ` Marc Zyngier
2021-03-16 10:13 ` [PATCH 09/10] KVM: arm64: Save/restore SVE state for nVHE Marc Zyngier
2021-03-17 17:57 ` Will Deacon
2021-03-18 9:12 ` Marc Zyngier
2021-03-16 10:13 ` [PATCH 10/10] KVM: arm64: Enable SVE support " Marc Zyngier
2021-03-17 18:00 ` Will Deacon
2021-03-18 9:14 ` Marc Zyngier
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