From: Paolo Bonzini <pbonzini@redhat.com>
To: "Xu, Like" <like.xu@intel.com>, Sean Christopherson <seanjc@google.com>
Cc: Vitaly Kuznetsov <vkuznets@redhat.com>,
Wanpeng Li <wanpengli@tencent.com>,
Jim Mattson <jmattson@google.com>, Joerg Roedel <joro@8bytes.org>,
kvm@vger.kernel.org, linux-kernel@vger.kernel.org,
Like Xu <like.xu@linux.intel.com>
Subject: Re: [PATCH v2 4/4] KVM: x86: Expose Architectural LBR CPUID and its XSAVES bit
Date: Fri, 5 Feb 2021 12:00:59 +0100 [thread overview]
Message-ID: <7698fd6c-94da-e352-193f-e09e002a8961@redhat.com> (raw)
In-Reply-To: <b73a2945-11b9-38bf-845a-c64e7caa9d2e@intel.com>
On 05/02/21 09:16, Xu, Like wrote:
> Hi Paolo,
>
> I am wondering if it is acceptable for you to
> review the minor Architecture LBR patch set without XSAVES for v5.12 ?
>
> As far as I know, the guest Arch LBR can still work without XSAVES
> support.
I dopn't think it can work. You could have two guests on the same
physical CPU and the MSRs would be corrupted if the guests write to the
MSR but they do not enable the LBRs.
Paolo
next prev parent reply other threads:[~2021-02-05 11:05 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-02-03 13:57 [PATCH v2 0/4] KVM: x86/pmu: Guest Architectural LBR Enabling Like Xu
2021-02-03 13:57 ` [PATCH v2 1/4] KVM: vmx/pmu: Add MSR_ARCH_LBR_DEPTH emulation for Arch LBR Like Xu
2021-03-01 22:34 ` Sean Christopherson
2021-03-02 2:52 ` Like Xu
2021-02-03 13:57 ` [PATCH v2 2/4] KVM: vmx/pmu: Add MSR_ARCH_LBR_CTL " Like Xu
2021-02-03 13:57 ` [PATCH v2 3/4] KVM: vmx/pmu: Add Arch LBR emulation and its VMCS field Like Xu
2021-02-03 13:57 ` [PATCH v2 4/4] KVM: x86: Expose Architectural LBR CPUID and its XSAVES bit Like Xu
2021-02-03 14:37 ` Paolo Bonzini
2021-02-04 0:59 ` Xu, Like
2021-02-05 8:16 ` Xu, Like
2021-02-05 11:00 ` Paolo Bonzini [this message]
2021-02-07 1:02 ` Xu, Like
2021-02-08 10:31 ` Paolo Bonzini
2021-04-14 1:00 ` Xu, Like
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